From 83e048f7a0e05fd6877732c8561baee9eeefacbb Mon Sep 17 00:00:00 2001 From: Kevin Brace Date: Thu, 6 Jul 2017 22:43:43 -0500 Subject: Added via_fp_set_secondary_power_seq_type This is an inline function. Signed-off-by: Kevin Brace --- drivers/gpu/drm/via/crtc_hw.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h index cb2fae3eea7d..0e7850e317ec 100644 --- a/drivers/gpu/drm/via/crtc_hw.h +++ b/drivers/gpu/drm/via/crtc_hw.h @@ -435,6 +435,24 @@ via_fp_set_primary_hard_power(void __iomem *regs, bool power_state) "Sequence: %s\n", power_state ? "On" : "Off"); } +/* + * Sets CX700 / VX700 or later chipset's FP secondary + * power sequence control type. + */ +static inline void +via_fp_set_secondary_power_seq_type(void __iomem *regs, + bool ctrl_type) +{ + /* 3X5.D3[0] - FP Secondary Power Sequence Control Type + * 0: Hardware Control + * 1: Software Control */ + svga_wcrt_mask(regs, 0xD3, + ctrl_type ? 0x00 : BIT(0), BIT(0)); + DRM_DEBUG_KMS("FP Secondary Power Sequence Control Type: " + "%s Control\n", + ctrl_type ? "Hardware" : "Software"); +} + /* * Sets FPDP (Flat Panel Display Port) Low I/O pad state. */ -- cgit v1.2.3