diff options
author | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:51:26 +0100 |
---|---|---|
committer | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:51:26 +0100 |
commit | 168b335ba49e20288287f483f9e76e5836688846 (patch) | |
tree | 05221fec95bd5bea5e7f3ee5f42caaf8de87b169 | |
parent | 026bcc535bcb49a619b93a9f70bb08232b3da325 (diff) |
Remove more unknown numbers, marvel at the fact that this code ever displayed
anything, ever. Reverse engineering is hard, let's go drinking
-rw-r--r-- | avivotool/avivotool.c | 8 | ||||
-rw-r--r-- | include/radeon_reg.h | 22 | ||||
-rw-r--r-- | xorg/avivo_output.c | 8 |
3 files changed, 25 insertions, 13 deletions
diff --git a/avivotool/avivotool.c b/avivotool/avivotool.c index a2a5169..3fa5bd0 100644 --- a/avivotool/avivotool.c +++ b/avivotool/avivotool.c @@ -466,7 +466,7 @@ void radeon_output_set(char *output, char *status) if (on) { SET_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL, 0x10000011); SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x0000001f); - SET_REG(AVIVO_TMDSA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); + SET_REG(AVIVO_TMDSA_CNTL, 0x00001010 | AVIVO_TMDSA_CNTL_ENABLE); } else { SET_REG(AVIVO_TMDSA_CNTL, 0x00001010); @@ -480,7 +480,7 @@ void radeon_output_set(char *output, char *status) if (on) { SET_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL, 0x30000011); SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x0000003e); - SET_REG(AVIVO_LVTMA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); + SET_REG(AVIVO_LVTMA_CNTL, 0x00001010 | AVIVO_TMDSA_CNTL_ENABLE); } else { SET_REG(AVIVO_LVTMA_CNTL, 0x1010); @@ -901,9 +901,9 @@ void radeon_cmd_regs(const char *type) show_dac1 = 1; if (GET_REG(AVIVO_DAC2_CNTL) & AVIVO_DAC_EN) show_dac2 = 1; - if (GET_REG(AVIVO_TMDSA_CNTL) & AVIVO_TMDS_CNTL_UNK0) + if (GET_REG(AVIVO_TMDSA_CNTL) & AVIVO_TMDSA_CNTL_ENABLE) show_tmds1 = 1; - if (GET_REG(AVIVO_LVTMA_CNTL) & AVIVO_TMDS_CNTL_UNK0) + if (GET_REG(AVIVO_LVTMA_CNTL) & AVIVO_TMDSA_CNTL_ENABLE) show_tmds2 = 1; if (GET_REG(AVIVO_LVDS_EN) & AVIVO_LVDS_EN) show_lvds = 1; diff --git a/include/radeon_reg.h b/include/radeon_reg.h index e970ac1..5c22039 100644 --- a/include/radeon_reg.h +++ b/include/radeon_reg.h @@ -3368,13 +3368,13 @@ * UNK6 seems to kill the feed LVDS & DVI */ #define AVIVO_TMDSA_CNTL 0x7880 -# define AVIVO_TMDS_CNTL_UNK0 (1 << 0) -# define AVIVO_TMDS_CNTL_UNK1 (1 << 4) -# define AVIVO_TMDS_CNTL_UNK2 (1 << 8) -# define AVIVO_TMDS_CNTL_UNK3 (1 << 12) -# define AVIVO_TMDS_CNTL_UNK4 (1 << 16) -# define AVIVO_TMDS_CNTL_UNK5 (1 << 24) -# define AVIVO_TMDS_CNTL_UNK6 (1 << 28) +# define AVIVO_TMDSA_CNTL_ENABLE (1 << 0) +# define AVIVO_TMDSA_CNTL_HPD_MASK (1 << 4) +# define AVIVO_TMDSA_CNTL_HPD_SELECT (1 << 8) +# define AVIVO_TMDSA_CNTL_SYNC_PHASE (1 << 12) +# define AVIVO_TMDSA_CNTL_PIXEL_ENCODING (1 << 16) +# define AVIVO_TMDSA_CNTL_DUAL_LINK_ENABLE (1 << 24) +# define AVIVO_TMDSA_CNTL_SWAP (1 << 28) #define AVIVO_TMDSA_CRTC_SOURCE 0x7884 /* 78a8 appears to be some kind of (reasonably tolerant) clock? * 78d0 definitely hits the transmitter, definitely clock. */ @@ -3421,6 +3421,14 @@ # define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) #define AVIVO_LVTMA_CNTL 0x7a80 +#define AVIVO_TMDSA_CNTL 0x7880 +# define AVIVO_LVTMA_CNTL_ENABLE (1 << 0) +# define AVIVO_LVTMA_CNTL_HPD_MASK (1 << 4) +# define AVIVO_LVTMA_CNTL_HPD_SELECT (1 << 8) +# define AVIVO_LVTMA_CNTL_SYNC_PHASE (1 << 12) +# define AVIVO_LVTMA_CNTL_PIXEL_ENCODING (1 << 16) +# define AVIVO_LVTMA_CNTL_DUAL_LINK_ENABLE (1 << 24) +# define AVIVO_LVTMA_CNTL_SWAP (1 << 28) #define AVIVO_LVTMA_CRTC_SOURCE 0x7a84 #define AVIVO_LVTMA_BIT_DEPTH_CONTROL 0x7a94 # define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) diff --git a/xorg/avivo_output.c b/xorg/avivo_output.c index 143b8c9..2d8d2b5 100644 --- a/xorg/avivo_output.c +++ b/xorg/avivo_output.c @@ -94,7 +94,9 @@ avivo_output_tmds1_setup(xf86OutputPtr output) tmp = (tmp & ~(AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)) | 1; OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0x1F); - OUTREG(AVIVO_TMDSA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); + + /* FIXME - this should be set from scratch, not just read and reset */ + OUTREG(AVIVO_TMDSA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | AVIVO_TMDSA_CNTL_ENABLE)); OUTREG(AVIVO_TMDSA_DCBALANCER_CONTROL, AVIVO_TMDSA_DCBALANCER_CONTROL_EN); OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp | (AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)); @@ -131,7 +133,9 @@ avivo_output_tmds2_setup(xf86OutputPtr output) tmp = (tmp & ~(AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET)) | 1; OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1E1F); - OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); + + /* FIXME: This is wrong, surely? Or are we assuming that the TMDS is set up properly? */ + OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | AVIVO_LVTMA_CNTL_ENABLE)); OUTREG(AVIVO_LVTMA_DCBALANCER_CONTROL, AVIVO_LVTMA_DCBALANCER_CONTROL_EN); /* FIXME: Bonghits? Make really sure we reenable the PLLs*/ |