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| author | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:44:15 +0100 |
|---|---|---|
| committer | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:44:15 +0100 |
| commit | 026bcc535bcb49a619b93a9f70bb08232b3da325 (patch) | |
| tree | 0d2d85beb3e3951d93fe44e3a544bc1268ec2c42 | |
| parent | 2a60577112c7f92ab93c5a646998a24478e18f48 (diff) | |
Remove more magic numbers
| -rw-r--r-- | include/radeon_reg.h | 12 | ||||
| -rw-r--r-- | xorg/avivo_output.c | 4 |
2 files changed, 14 insertions, 2 deletions
diff --git a/include/radeon_reg.h b/include/radeon_reg.h index c789436..e970ac1 100644 --- a/include/radeon_reg.h +++ b/include/radeon_reg.h @@ -3388,6 +3388,11 @@ # define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) # define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) # define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) +#define AVIVO_TMDSA_DCBALANCER_CONTROL 0x78d0 +# define AVIVO_TMDSA_DCBALANCER_CONTROL_EN (1 << 0) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_EN (1 << 8) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_IN (16) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_FORCE (1 << 24) #define AVIVO_TMDSA_DATA_SYNCHRONIZATION 0x78d8 # define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) # define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) @@ -3426,6 +3431,13 @@ # define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) # define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) # define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) + +#define AVIVO_LVTMA_DCBALANCER_CONTROL 0x7ad0 +# define AVIVO_LVTMA_DCBALANCER_CONTROL_EN (1 << 0) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_EN (1 << 8) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_IN (16) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_FORCE (1 << 24) + #define AVIVO_LVTMA_DATA_SYNCHRONIZATION 0x78d8 # define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) # define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) diff --git a/xorg/avivo_output.c b/xorg/avivo_output.c index d97f59f..143b8c9 100644 --- a/xorg/avivo_output.c +++ b/xorg/avivo_output.c @@ -95,7 +95,7 @@ avivo_output_tmds1_setup(xf86OutputPtr output) OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0x1F); OUTREG(AVIVO_TMDSA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); - OUTREG(0x78D0, 0x1); + OUTREG(AVIVO_TMDSA_DCBALANCER_CONTROL, AVIVO_TMDSA_DCBALANCER_CONTROL_EN); OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp | (AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)); OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); @@ -132,7 +132,7 @@ avivo_output_tmds2_setup(xf86OutputPtr output) OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1E1F); OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); - OUTREG(0x7AD0, 0x1); + OUTREG(AVIVO_LVTMA_DCBALANCER_CONTROL, AVIVO_LVTMA_DCBALANCER_CONTROL_EN); /* FIXME: Bonghits? Make really sure we reenable the PLLs*/ OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); |