diff options
author | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:28:46 +0100 |
---|---|---|
committer | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-13 00:28:46 +0100 |
commit | 2a60577112c7f92ab93c5a646998a24478e18f48 (patch) | |
tree | f0c62d185ca1d89247f65fe919294247cd045840 | |
parent | a71856c4f14c03854a0cc12cbbde29410edce211 (diff) |
Define TMDS*MYSTERY3. How does this driver work?
-rw-r--r-- | avivotool/avivotool.c | 16 | ||||
-rw-r--r-- | include/radeon_reg.h | 39 | ||||
-rw-r--r-- | xorg/avivo_output.c | 29 | ||||
-rw-r--r-- | xorg/avivo_state.c | 8 |
4 files changed, 59 insertions, 33 deletions
diff --git a/avivotool/avivotool.c b/avivotool/avivotool.c index 083654a..a2a5169 100644 --- a/avivotool/avivotool.c +++ b/avivotool/avivotool.c @@ -464,7 +464,7 @@ void radeon_output_set(char *output, char *status) if (strcmp(output, "tmds1") == 0) { if (on) { - SET_REG(AVIVO_TMDSA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL, 0x10000011); SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x0000001f); SET_REG(AVIVO_TMDSA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); } @@ -472,13 +472,13 @@ void radeon_output_set(char *output, char *status) SET_REG(AVIVO_TMDSA_CNTL, 0x00001010); SET_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, 0x04000000); SET_REG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, 0x00000000); - SET_REG(AVIVO_TMDSA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL, 0x10000011); SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x00060000); } } else if (strcmp(output, "tmds2") == 0) { if (on) { - SET_REG(AVIVO_LVTMA_MYSTERY3, 0x30000011); + SET_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL, 0x30000011); SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x0000003e); SET_REG(AVIVO_LVTMA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); } @@ -486,7 +486,7 @@ void radeon_output_set(char *output, char *status) SET_REG(AVIVO_LVTMA_CNTL, 0x1010); SET_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0x04000000); SET_REG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, 0x00000000); - SET_REG(AVIVO_LVTMA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL, 0x10000011); SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x00060000); } } @@ -797,13 +797,13 @@ static struct { REGLIST(AVIVO_TMDSA_CLOCK_CNTL), REGLIST(AVIVO_TMDSA_BIT_DEPTH_CONTROL), REGLIST(AVIVO_TMDSA_DATA_SYNCHRONIZATION), - REGLIST(AVIVO_TMDSA_MYSTERY3), + REGLIST(AVIVO_TMDSA_TRANSMITTER_CONTROL), REGLIST(AVIVO_LVTMA_CNTL), REGLIST(AVIVO_LVTMA_CLOCK_ENABLE), REGLIST(AVIVO_LVTMA_CLOCK_CNTL), REGLIST(AVIVO_LVTMA_BIT_DEPTH_CONTROL), REGLIST(AVIVO_LVTMA_DATA_SYNCHRONIZATION), - REGLIST(AVIVO_LVTMA_MYSTERY3), + REGLIST(AVIVO_LVTMA_TRANSMITTER_CONTROL), REGLIST(AVIVO_TMDS_STATUS), REGLIST(AVIVO_LVDS_CNTL), REGLIST(AVIVO_LVDS_BACKLIGHT_CNTL), @@ -1174,7 +1174,7 @@ void radeon_cmd_regs(const char *type) SHOW_REG(AVIVO_TMDSA_CLOCK_CNTL); SHOW_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL); SHOW_REG(AVIVO_TMDSA_DATA_SYNCHRONIZATION); - SHOW_REG(AVIVO_TMDSA_MYSTERY3); + SHOW_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL); } else { if (!shut_up) @@ -1195,7 +1195,7 @@ void radeon_cmd_regs(const char *type) SHOW_REG(AVIVO_LVTMA_CLOCK_CNTL); SHOW_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL); SHOW_REG(AVIVO_LVTMA_DATA_SYNCHRONIZATION); - SHOW_REG(AVIVO_LVTMA_MYSTERY3); + SHOW_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL); } else { if (!shut_up) diff --git a/include/radeon_reg.h b/include/radeon_reg.h index 3c06730..c789436 100644 --- a/include/radeon_reg.h +++ b/include/radeon_reg.h @@ -3399,13 +3399,21 @@ /* 790c is a clock? * 7910 appears to be some kind of control field, again. (1 << 25) * must be enabled to get a signal on my monitor. */ -#define AVIVO_TMDSA_MYSTERY3 0x7910 -# define AVIVO_TMDS_MYSTERY3_24 (1 << 24) -# define AVIVO_TMDS_MYSTERY3_25 (1 << 25) -# define AVIVO_TMDS_MYSTERY3_4 (1 << 4) -# define AVIVO_TMDS_MYSTERY3_3 (1 << 3) -# define AVIVO_TMDS_MYSTERY3_2 (1 << 2) -# define AVIVO_TMDS_MYSTERY3_1 (1 << 1) +#define AVIVO_TMDSA_TRANSMITTER_CONTROL 0x7910 +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_HPD_MASK (2) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK (1 << 8) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK (1 << 14) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_CLK_PATTERN (16) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) #define AVIVO_LVTMA_CNTL 0x7a80 #define AVIVO_LVTMA_CRTC_SOURCE 0x7a84 @@ -3423,7 +3431,22 @@ # define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) #define AVIVO_LVTMA_CLOCK_ENABLE 0x7b00 #define AVIVO_LVTMA_CLOCK_CNTL 0x7b04 -#define AVIVO_LVTMA_MYSTERY3 0x7b10 + +#define AVIVO_LVTMA_TRANSMITTER_CONTROL 0x7b10 +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_HPD_MASK (2) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK (1 << 8) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK (1 << 14) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_CLK_PATTERN (16) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) #define AVIVO_LVDS_CNTL 0x7af0 # define AVIVO_LVDS_EN ((1 << 4)) diff --git a/xorg/avivo_output.c b/xorg/avivo_output.c index eac7fef..d97f59f 100644 --- a/xorg/avivo_output.c +++ b/xorg/avivo_output.c @@ -89,15 +89,16 @@ avivo_output_tmds1_setup(xf86OutputPtr output) avivo_crtc->crtc_number); OUTREG(AVIVO_TMDSA_CRTC_SOURCE, avivo_crtc->crtc_number); } - tmp = INREG(AVIVO_TMDSA_MYSTERY3); - tmp = (tmp & ~0x3) | 1; - OUTREG(AVIVO_TMDSA_MYSTERY3, tmp); + tmp = INREG(AVIVO_TMDSA_TRANSMITTER_CONTROL); + + tmp = (tmp & ~(AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)) | 1; + OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0x1F); OUTREG(AVIVO_TMDSA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); OUTREG(0x78D0, 0x1); - OUTREG(AVIVO_TMDSA_MYSTERY3, tmp); - OUTREG(AVIVO_TMDSA_MYSTERY3, tmp | 0x3); - OUTREG(AVIVO_TMDSA_MYSTERY3, tmp); + OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); + OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp | (AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)); + OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp); /* FIXME: Is this rewriting really necessary? */ OUTREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL); @@ -126,15 +127,17 @@ avivo_output_tmds2_setup(xf86OutputPtr output) avivo_crtc->crtc_number); OUTREG(AVIVO_LVTMA_CRTC_SOURCE, avivo_crtc->crtc_number); } - tmp = INREG(AVIVO_LVTMA_MYSTERY3); - tmp = (tmp & ~0x3) | 1; - OUTREG(AVIVO_LVTMA_MYSTERY3, tmp); + tmp = INREG(AVIVO_LVTMA_TRANSMITTER_CONTROL); + tmp = (tmp & ~(AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET)) | 1; + OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1E1F); - OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_LVTMA_CNTL) | 0x1)); + OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | 0x1)); OUTREG(0x7AD0, 0x1); - OUTREG(AVIVO_LVTMA_MYSTERY3, tmp); - OUTREG(AVIVO_LVTMA_MYSTERY3, tmp | 0x3); - OUTREG(AVIVO_LVTMA_MYSTERY3, tmp); + + /* FIXME: Bonghits? Make really sure we reenable the PLLs*/ + OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); + OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp | (AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET)); + OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp); /* FIXME: Is this rewriting really necessary? */ OUTREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL); diff --git a/xorg/avivo_state.c b/xorg/avivo_state.c index ed981aa..947b143 100644 --- a/xorg/avivo_state.c +++ b/xorg/avivo_state.c @@ -165,7 +165,7 @@ avivo_restore_state(ScrnInfoPtr screen_info) OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, state->tmds1_mystery1); OUTREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, state->tmds1_mystery2); OUTREG(AVIVO_TMDSA_CLOCK_CNTL, state->tmds1_clock_cntl); - OUTREG(AVIVO_TMDSA_MYSTERY3, state->tmds1_mystery3); + OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, state->tmds1_mystery3); OUTREG(AVIVO_DAC2_CNTL, state->dac2_cntl); OUTREG(AVIVO_DAC2_MYSTERY1, state->dac2_mystery1); OUTREG(AVIVO_DAC2_MYSTERY2, state->dac2_mystery2); @@ -173,7 +173,7 @@ avivo_restore_state(ScrnInfoPtr screen_info) OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, state->tmds2_mystery1); OUTREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, state->tmds2_mystery2); OUTREG(AVIVO_LVTMA_CLOCK_CNTL, state->tmds2_clock_cntl); - OUTREG(AVIVO_LVTMA_MYSTERY3, state->tmds2_mystery3); + OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, state->tmds2_mystery3); #ifdef WITH_VGAHW vgaHWPtr hwp = VGAHWPTR(screen_info); vgaHWUnlock(hwp); @@ -283,7 +283,7 @@ avivo_save_state(ScrnInfoPtr screen_info) state->tmds1_mystery1 = INREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL); state->tmds1_mystery2 = INREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION); state->tmds1_clock_cntl = INREG(AVIVO_TMDSA_CLOCK_CNTL); - state->tmds1_mystery3 = INREG(AVIVO_TMDSA_MYSTERY3); + state->tmds1_mystery3 = INREG(AVIVO_TMDSA_TRANSMITTER_CONTROL); state->dac2_cntl = INREG(AVIVO_DAC2_CNTL); state->dac2_mystery1 = INREG(AVIVO_DAC2_MYSTERY1); @@ -293,5 +293,5 @@ avivo_save_state(ScrnInfoPtr screen_info) state->tmds2_mystery1 = INREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL); state->tmds2_mystery2 = INREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION); state->tmds2_clock_cntl = INREG(AVIVO_LVTMA_CLOCK_CNTL); - state->tmds2_mystery3 = INREG(AVIVO_LVTMA_MYSTERY3); + state->tmds2_mystery3 = INREG(AVIVO_LVTMA_TRANSMITTER_CONTROL); } |