summaryrefslogtreecommitdiff
path: root/arch/blackfin/mach-bf518
AgeCommit message (Collapse)AuthorFilesLines
2012-12-13blackfin: anomaly: add anomaly 16000030 for bf5xxSonic Zhang1-0/+1
Drivers common to both bf5xx and bf60x chip families may use this anomaly id. So add it to bf5xx header files also. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-05-21blackfin: twi: Move TWI peripheral pin request array to platform dataSonic Zhang2-0/+10
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-05-21blackfin: license: Change ADI BSD licenseSonic Zhang9-10/+9
Change ADI BSD license to standart 3 clause BSD license for some blackfin arch code requested by ADI Legal. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-05-21blackfin: twi: move twi bit mask macro to twi head fileSonic Zhang1-71/+0
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-02-19arch/blackfin: don't generate random mac in bfin_get_ether_addr()Danny Kukawka2-4/+4
Changed bfin_get_ether_addr() to return a state and to set no random mac address if the board don't provide one. Let the caller of bfin_get_ether_addr() set a random mac address if the return value is not 0. v2: don't set random mac in bfin_get_ether_addr() Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-09blackfin: mac: dsa: add vlan mask in board fileSteven Miao1-0/+2
Else push file through ftp/rcp will fail. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: config: update macro SPI_BFIN in board fileSonic Zhang2-6/+6
Macro name for spi controller driver has been modified, so update default board file accordingly. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2011-11-14Blackfin: add serial TX IRQ in individual platform resourceSonic Zhang2-4/+24
The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips, so move the values to the platform resources. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2011-10-31blackfin: Add export.h to files using EXPORT_SYMBOL/THIS_MODULEPaul Gortmaker1-0/+1
These particular files were just assuming that module.h was somehow in the include paths. Give them the more minimalist header file explicitly. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2011-07-23Blackfin: bf51x: fix alternative portmux optionsMike Frysinger2-45/+87
The BF51x's alternative portmux Kconfig options were copy & pasted from the BF52x, but never tweaked to reflect it. So drop the old options as they were never used (and were simply wrong), and add the BF51x specific pieces to the Kconfig and header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: update anomaly lists to latest public infoMike Frysinger1-8/+16
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: boards: clean up redundant/dead spi resourcesMike Frysinger2-106/+0
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: bf51x: fix up RSI_PID# MMR definesMike Frysinger1-8/+8
Looks like the copying of MMR defines from the SDH block missed updating the addresses of the RSI_PID# registers. So tweak them to reflect the actual hardware. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: mach/bfin_serial_5xx.h: punt now-unused headerMike Frysinger1-79/+0
Now that the serial code has been unified in bfin_serial.h, and the Blackfin UART driver pushed its resources to the boards files, we don't need these headers anymore. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: update anomaly lists to latest public infoMike Frysinger1-1/+3
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: bf51x/bf52x: fix typo in hysteresis MMR namesMike Frysinger2-12/+12
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: clean up style in irq definesMike Frysinger1-109/+109
These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: unify core IRQ definitionsMike Frysinger1-41/+1
Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: punt unused HDMA masksMike Frysinger1-19/+0
No code uses these, and the short define names are polluting the global namespace where they collide with things like common irq files. So just punt the damned things. If in the future we need HDMA support, we can make a standalone header for these things. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: boards: add missing "static" to peripheral listsMike Frysinger2-8/+8
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bf518f-ezbrd: fix dsa resourcesSonic Zhang1-9/+8
On bf518-ezbrd with DSA Ethernet switch enabled, on chip MAC is connecting to phy at address 3. If allowing the netdevice framework to probe both 3 phys of the switch when registering MAC phy, phy at address 1 is checked for link active status other than phy at address 3. If connecting a cable to port 2 and leave port 1 open, link status in phy 2 and 3 are online, while that in phy 1 is offline. So, the phy layer sets wrong offline status to net device on port 3. In this case, no data can be transferred via ethernet port 2. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: sport_uart resources: remove unused secondary RX/TX pinsSonic Zhang2-4/+4
The SPORT/UART driver doesn't use the secondary channel pins, so don't try and request them thus keeping other drivers from using them. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: unify pll.h headersMike Frysinger1-63/+1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: drop asm/irq.h include from mach headersMike Frysinger1-3/+0
These were only included because of the irq handling of the PLL funcs, and those PLL funcs have been moved out into their own header now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bf51x/bf52x: drop redundant "base" def/cdef headerMike Frysinger4-2449/+2418
The defBF512.h header exists only to include defBF51x_base.h, and it is the only place where defBF51x_base.h is included. So move the contents of the defBF51x_base.h header into the defBF512.h header. Same situation for the other def/cdef pairs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: clean up mach header includesMike Frysinger7-68/+36
The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: push gpio (port) defines into common headersMike Frysinger2-49/+4
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: dma: constify MMR pointer arrayMike Frysinger1-1/+1
The array of pointers is never written, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: standardize DMAC traffic control MMRs & MDMA MMRsMike Frysinger2-16/+6
Use the same naming convention for DMA traffic MMRs (most were legacy anyways) so we can avoid useless ifdef trees. Same goes for MDMA names -- this actually allows us to undo a bunch of ifdef redirects that existed for this purpose alone. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bfin_serial.h: unify heavily duplicated serial codeMike Frysinger4-131/+16
Each Blackfin port has been duplicating UART structures and defines when there really is no need for it. So start a new bfin_serial.h header to unify all these pieces and give ourselves a fresh start. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25netdev: bfin_mac: push settings to platform resourcesSonic Zhang2-2/+66
Move all the pin settings out of the Kconfig and into the platform resources (MII vs RMII). This clean up also lets us push out the phy settings so that board porters may control the layout. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: bf518-ezkit: add ssm2603 codec resourcesBob Liu1-0/+17
This board has a SSM2603 codec, so make sure we have the right resources declared for it. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpersBob Liu1-16/+16
The RX/TX address is always the same regardless of the size of the access. That means there is no dedicated "16bit" or "32bit" MMR. Trying to use these currently leads to compile errors. So change everything to use the right MMR define. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: boards: fix num_chipselect values for on-chip SPI busesMike Frysinger2-3/+3
The num_chipselect field for on-chip Blackfin SPI buses is supposed to be 1 larger than the number of actual CSs available. This is because the hardware starts counting at 1 and not 0. There is a field for "CS0", but it is marked as "reserved" everywhere. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: punt short SPI MMR bit namesMike Frysinger1-45/+0
Now that the common header defines everything and the SPI drivers are using it, we can drop these duplicated global namespace polluters. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-07Blackfin: Rename IRQ flags handling functionsDavid Howells1-4/+4
Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: David Howells <dhowells@redhat.com>
2010-10-07Blackfin: Split PLL code from mach-specific cdef headersDavid Howells2-50/+63
Split the PLL control code from the Blackfin machine-specific cdef headers so that the irqflags functions can be renamed without incurring a header loop. Signed-off-by: David Howells <dhowells@redhat.com>
2010-08-27Blackfin: punt duplicate SPORT MMR definesMike Frysinger1-82/+0
The common bfin_sport.h header now has unified definitions of these, so stop polluting the global namespace. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: unify rotary encoder bitmasksMike Frysinger1-108/+0
Avoid duplication and ugly global namespace pollution. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: unify SDH/RSI bitmasksMike Frysinger1-135/+0
Avoid duplication and ugly global namespace pollution. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: TWI: clean up the MMR namesMike Frysinger1-18/+18
The standard short name for control is CTL and not CTRL. Use TWI0_xxx even on parts that only have one TWI bus to keep things simple. Drop all the cdef helpers since the bus driver takes care of everything. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger optionsMichael Hennerich2-0/+166
Newer parts have optional Hysteresis/Schmitt Trigger options to help with dirty signals. So add some kconfig options for tuning this and enable it by default for people. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: gpio/portmux: clean up whitespace corruptionMike Frysinger2-42/+42
Random tabs instead of spaces, mixes of the two, and unicode spaces instead of ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)Mike Frysinger2-2/+3
Even though the PH8 pin is only internal to the processor packaging, it can be controlled like any other GPIO pin. Now that we have a proper GPIO define, we can fix the SPI0 CS4 define for the internal SPI flash. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CSMike Frysinger1-0/+1
This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of the GPIO value so it can be used with the normal gpio API. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: BF51x: fix typo in HWAIT pin defineMike Frysinger1-1/+1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06Blackfin: update anomaly lists to latest public infoMike Frysinger1-4/+17
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-09Blackfin: add support for the on-chip MAC status interruptsMichael Hennerich1-1/+10
This patch provides infrastructure for MAC Wake-On-Lan and PHYINT use in phylib. New Interrupts added: IRQ_MAC_PHYINT /* PHY_INT Interrupt */ IRQ_MAC_MMCINT /* MMC Counter Interrupt */ IRQ_MAC_RXFSINT /* RX Frame-Status Interrupt */ IRQ_MAC_TXFSINT /* TX Frame-Status Interrupt */ IRQ_MAC_WAKEDET /* Wake-Up Interrupt */ IRQ_MAC_RXDMAERR /* RX DMA Direction Error Interrupt */ IRQ_MAC_TXDMAERR /* TX DMA Direction Error Interrupt */ IRQ_MAC_STMDONE /* Station Mgt. Transfer Done Interrupt */ On BF537/6 the implementation is not straight forward since there are now two chained chained_handlers. A cleaner approach would have been to add latter IRQs to the demux of IRQ_GENERIC_ERROR. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-09Blackfin: increase NR_IRQS beyond NR on-chip IRQsMichael Hennerich1-1/+2
This makes room for off-chip IRQ controllers. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-03-09Blackfin: tcm-bf518: new board portHarald Krapfenbauer3-0/+759
Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>