diff options
| author | James Cosin <jkosin@intcomgrp.com> | 2012-08-20 11:55:36 +0800 |
|---|---|---|
| committer | Bob Liu <lliubbo@gmail.com> | 2012-10-08 14:36:29 +0800 |
| commit | 810f1512dc8a1f64c22229c3def85fc398b6a24f (patch) | |
| tree | 3102b28e57030bacaee88a758710bc68dd20821c /ipc | |
| parent | ce8609146d09df213ed1e842ece7ad477e0ab7a6 (diff) | |
Blackfin: cpufreq: fix dpm_state_table
This patch fixes an assumption that cclk's initial divisor will always be 1 (or
0 in the register). TSCALE is always initialized on startup with a value of 4
regardless of the inital cclk divisor; so, we can't make the assumption without
making lots of other assumptions. The TPERIOD value is set with a value of the
current cclk (value / (HZ * TSCALE)) - 1; so, we need to adjust based on this
initial frequency and not use cclk's initial divisor for adjusting the tscale.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions