| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2012-09-19 | llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode. | chapuni | 1 | -1/+1 |
| 2012-09-18 | Add test for r164132. | rdivacky | 1 | -0/+7 |
| 2012-09-10 | Add newline. | Chad Rosier | 1 | -1/+1 |
| 2012-09-10 | [ms-inline asm] Add support for .att_syntax directive. | Chad Rosier | 1 | -2/+4 |
| 2012-08-31 | X86: Fix encoding of 'movd %xmm0, %rax' | Jim Grosbach | 1 | -0/+4 |
| 2012-07-26 | Make l/q suffixes on AVX forms of scalar convert instructions consistent with... | Craig Topper | 2 | -28/+28 |
| 2012-07-18 | Make x86 asm parser to check for xmm vs ymm for index register in gather inst... | Craig Topper | 2 | -0/+34 |
| 2012-07-10 | Reverse assembler/disassembler operand order for gather instructions. | Craig Topper | 1 | -8/+8 |
| 2012-07-03 | Add aliases for pblendvb, blendvpd, and blendvps instructions with the implic... | Craig Topper | 1 | -0/+26 |
| 2012-06-29 | X86: add more GATHER intrinsics in LLVM | Manman Ren | 1 | -2/+26 |
| 2012-06-26 | X86: add GATHER intrinsics (AVX2) in LLVM | Manman Ren | 1 | -0/+8 |
| 2012-06-26 | Remove some duplicate instructions that exist only to given different mnemoni... | Craig Topper | 2 | -12/+12 |
| 2012-05-29 | Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex... | Benjamin Kramer | 1 | -0/+25 |
| 2012-04-11 | Add retw and lretw instructions. Also, fix Intel syntax parsing for all | Charles Davis | 3 | -0/+25 |
| 2012-04-03 | Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. | Craig Topper | 1 | -0/+768 |
| 2012-03-21 | Fix generation of the address size override prefix. Add assertions for | Joerg Sonnenberger | 1 | -0/+13 |
| 2012-03-13 | Change the X86 assembler to not require a segment register on string | Kevin Enderby | 1 | -0/+3 |
| 2012-03-12 | Added a missing error check for X86 assembly with mismatched base and index | Kevin Enderby | 1 | -0/+4 |
| 2012-03-09 | Add the missing call to Error when a bad X86 scale expression is parsed. | Kevin Enderby | 1 | -0/+4 |
| 2012-03-09 | test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets. | NAKAMURA Takumi | 1 | -0/+11 |
| 2012-03-06 | Fix the operand ordering on aliases for shld and shrd. PR12173, part 2. | Eli Friedman | 1 | -13/+21 |
| 2012-03-05 | Make aliases for shld and shrd match gas. PR12173. | Eli Friedman | 1 | -6/+11 |
| 2012-02-23 | Updated the llvm-mc disassembler C API to support for the X86 target. | Kevin Enderby | 1 | -3/+3 |
| 2012-02-19 | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2 | -0/+6 |
| 2012-02-18 | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2 | -1/+50 |
| 2012-02-16 | Replace all instances of dg.exp file with lit.local.cfg, since all tests are ... | Eli Bendersky | 2 | -5/+1 |
| 2012-01-30 | Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,... | Devang Patel | 1 | -0/+3 |
| 2012-01-30 | Intel syntax. Support .intel_syntax directive. | Devang Patel | 1 | -0/+7 |
| 2012-01-27 | Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] | Devang Patel | 1 | -0/+2 |
| 2012-01-24 | Intel Syntax: Extend special hand coded logic, to recognize special instructi... | Devang Patel | 1 | -0/+3 |
| 2012-01-23 | Intel syntax: Robustify parsing of memory operand's displacement experssion. | Devang Patel | 1 | -2/+4 |
| 2012-01-23 | Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] | Devang Patel | 1 | -1/+3 |
| 2012-01-23 | Intel syntax: Parse segment registers. | Devang Patel | 1 | -0/+2 |
| 2012-01-20 | Intel syntax: Robustify register parsing. | Devang Patel | 1 | -0/+2 |
| 2012-01-20 | Intel syntax: Parse ... PTR [-8] | Devang Patel | 1 | -1/+2 |
| 2012-01-20 | Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. | Devang Patel | 1 | -1/+4 |
| 2012-01-19 | Post process 'and', 'sub' instructions and select better encoding, if available. | Devang Patel | 1 | -0/+8 |
| 2012-01-19 | Intel syntax: There is no need to create unary expr for simple negative displ... | Devang Patel | 1 | -0/+4 |
| 2012-01-19 | Post process 'xor', 'or' and 'cmp' instructions and select better encoding, i... | Devang Patel | 1 | -0/+22 |
| 2012-01-18 | Process instructions after match to select alternative encoding which may be ... | Devang Patel | 1 | -0/+24 |
| 2012-01-17 | Intel syntax: Fix parser match class to check memory operand size. | Devang Patel | 1 | -0/+2 |
| 2012-01-17 | Intel syntax: Parse "BYTE PTR [RDX + RCX]" | Devang Patel | 1 | -0/+2 |
| 2012-01-17 | Intel syntax: Do not unncessarily create plus expression for memory operand d... | Devang Patel | 1 | -0/+2 |
| 2012-01-17 | Intel syntax: Ignore mnemonic aliases. | Devang Patel | 1 | -0/+8 |
| 2012-01-17 | Intel syntax: Robustify memory operand parsing. | Devang Patel | 1 | -0/+8 |
| 2012-01-13 | Add new test. | Devang Patel | 1 | -0/+10 |
| 2012-01-12 | Remove test case, as Chris suggested. | Devang Patel | 1 | -23/+0 |
| 2012-01-12 | Add test case to check intel syntax parsing. | Devang Patel | 1 | -0/+23 |
| 2011-12-15 | Make sure we correctly note the existence of an i8 immediate for vblendvps an... | Eli Friedman | 1 | -0/+7 |
| 2011-12-12 | XOP instructions and encoding tests. | Jan Sjödin | 1 | -0/+584 |
