diff options
| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-15 20:53:42 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-15 20:53:42 +0000 |
| commit | 06e57ff43ed5fce6bb3676bcd705e13ef5620cbe (patch) | |
| tree | 91271dc5538ac41055518499d98c105919b1648d | |
| parent | 6441cb10ad207c66e2d6069e159fd0150deb8a54 (diff) | |
R600: use llvm intrinsic for flog2
Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165968 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 | ||||
| -rw-r--r-- | lib/Target/AMDGPU/AMDILIntrinsics.td | 2 | ||||
| -rw-r--r-- | lib/Target/AMDGPU/R600Instructions.td | 2 |
3 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 9b1d9aaedf..f44e3d3605 100644 --- a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -35,6 +35,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::FCEIL, MVT::f32, Legal); setOperationAction(ISD::FEXP2, MVT::f32, Legal); setOperationAction(ISD::FPOW, MVT::f32, Legal); + setOperationAction(ISD::FLOG2, MVT::f32, Legal); setOperationAction(ISD::FRINT, MVT::f32, Legal); setOperationAction(ISD::UDIV, MVT::i32, Expand); diff --git a/lib/Target/AMDGPU/AMDILIntrinsics.td b/lib/Target/AMDGPU/AMDILIntrinsics.td index 104b32e38c..4de5767427 100644 --- a/lib/Target/AMDGPU/AMDILIntrinsics.td +++ b/lib/Target/AMDGPU/AMDILIntrinsics.td @@ -180,8 +180,6 @@ let TargetPrefix = "AMDIL", isTarget = 1 in { UnaryIntFloat; def int_AMDIL_exn : GCCBuiltin<"__amdil_exn">, UnaryIntFloat; - def int_AMDIL_log : GCCBuiltin<"__amdil_log">, - UnaryIntFloat; def int_AMDIL_log_vec : GCCBuiltin<"__amdil_log_vec">, UnaryIntFloat; def int_AMDIL_ln : GCCBuiltin<"__amdil_ln">, diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index 9c0b6f7edb..40e83e8e32 100644 --- a/lib/Target/AMDGPU/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td @@ -771,7 +771,7 @@ class LOG_CLAMPED_Common <bits<11> inst> : R600_1OP < class LOG_IEEE_Common <bits<11> inst> : R600_1OP < inst, "LOG_IEEE", - [(set R600_Reg32:$dst, (int_AMDIL_log R600_Reg32:$src))] + [(set R600_Reg32:$dst, (flog2 R600_Reg32:$src))] >; class LSHL_Common <bits<11> inst> : R600_2OP < |