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path: root/drivers/clk/clk-oxnas.c
AgeCommit message (Expand)AuthorFilesLines
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
2016-10-23clk: oxnas: Add OX820 Gate clocksNeil Armstrong1-0/+58
2016-10-23clk: oxnas: Refactor to make use of devm_clk_hw_register()Neil Armstrong1-64/+84
2016-10-23clk: oxnas: Rename to clk_oxnas_gateNeil Armstrong1-16/+16
2016-07-06clk: oxnas: make it explicitly non-modularPaul Gortmaker1-12/+3
2016-06-20clk: Fix return value check in oxnas_stdclk_probe()Wei Yongjun1-2/+2
2016-04-21clk: Add Oxford Semiconductor OXNAS Standard ClocksNeil Armstrong1-0/+195