diff options
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 20 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/AMDILISelLowering.cpp | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/R600CodeEmitter.cpp | 4 |
3 files changed, 17 insertions, 11 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index cf912c1267d..1fa519db54f 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -372,26 +372,30 @@ static unsigned r600_fc_from_byte_stream(struct r600_shader_ctx *ctx, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE)); break; case 1: - tgsi_else(ctx); + llvm_if(ctx, &alu, + CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT)); break; case 2: - tgsi_endif(ctx); + tgsi_else(ctx); break; case 3: - tgsi_bgnloop(ctx); + tgsi_endif(ctx); break; case 4: - tgsi_endloop(ctx); + tgsi_bgnloop(ctx); break; case 5: - r600_break_from_byte_stream(ctx, &alu, - CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE)); + tgsi_endloop(ctx); break; case 6: r600_break_from_byte_stream(ctx, &alu, - CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT)); + CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT)); break; case 7: + r600_break_from_byte_stream(ctx, &alu, + CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE)); + break; + case 8: { unsigned opcode = TGSI_OPCODE_CONT; if (ctx->bc->chip_class == CAYMAN) { @@ -407,7 +411,7 @@ static unsigned r600_fc_from_byte_stream(struct r600_shader_ctx *ctx, tgsi_loop_brk_cont(ctx); } break; - case 8: + case 9: r600_break_from_byte_stream(ctx, &alu, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT)); break; diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp b/src/gallium/drivers/radeon/AMDILISelLowering.cpp index 81951c15755..fb335835425 100644 --- a/src/gallium/drivers/radeon/AMDILISelLowering.cpp +++ b/src/gallium/drivers/radeon/AMDILISelLowering.cpp @@ -1378,7 +1378,7 @@ AMDILTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const Cond = DAG.getNode( ISD::SELECT_CC, Op.getDebugLoc(), - LHS.getValueType(), + MVT::i32, LHS, RHS, DAG.getConstant(-1, MVT::i32), DAG.getConstant(0, MVT::i32), @@ -1496,7 +1496,7 @@ AMDILTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const CmpValue = DAG.getNode( ISD::SELECT_CC, Op.getDebugLoc(), - LHS.getValueType(), + MVT::i32, LHS, RHS, DAG.getConstant(-1, MVT::i32), DAG.getConstant(0, MVT::i32), diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp index 1de2d9e07a1..0c84633417a 100644 --- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp +++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp @@ -110,6 +110,7 @@ enum InstrTypes { enum FCInstr { FC_IF = 0, + FC_IF_INT, FC_ELSE, FC_ENDIF, FC_BGNLOOP, @@ -535,8 +536,9 @@ void R600CodeEmitter::EmitFCInstr(MachineInstr &MI) instr = FC_CONTINUE; break; case AMDGPU::IF_LOGICALNZ_f32: - case AMDGPU::IF_LOGICALNZ_i32: instr = FC_IF; + case AMDGPU::IF_LOGICALNZ_i32: + instr = FC_IF_INT; break; case AMDGPU::IF_LOGICALZ_f32: abort(); |