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-rw-r--r--test/MC/Disassembler/ARM/neon-tests.txt91
1 files changed, 91 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/neon-tests.txt b/test/MC/Disassembler/ARM/neon-tests.txt
new file mode 100644
index 00000000000..a7b6b1ccb40
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+++ b/test/MC/Disassembler/ARM/neon-tests.txt
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+# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a8 | FileCheck %s
+
+# CHECK: vbif q15, q7, q0
+0x50 0xe1 0x7e 0xf3
+
+# CHECK: vcvt.f32.s32 q15, q0, #1
+0x50 0xee 0xff 0xf2
+
+# CHECK: vdup.32 q3, d1[0]
+0x41 0x6c 0xb4 0xf3
+
+# CHECK: vld1.8 {d17, d18}, [r6], r5
+0x05 0x1a 0x66 0xf4
+
+# CHECK: vld1.8 {d17, d18, d19}, [r6], r5
+0x05 0x16 0x66 0xf4
+
+# CHECK: vld4.8 {d0, d1, d2, d3}, [r2], r7
+0x07 0x00 0x22 0xf4
+
+# CHECK: vld4.8 {d4, d6, d8, d10}, [r2]
+0x0f 0x41 0x22 0xf4
+
+# CHECK: vld1.32 {d3[], d4[]}, [r0, :32]!
+0xbd 0x3c 0xa0 0xf4
+
+# CHECK: vld4.16 {d3[], d5[], d7[], d9[]}, [r0, :64]!
+0x7d 0x3f 0xa0 0xf4
+
+# CHECK: vorr d0, d15, d15
+0x1f 0x01 0x2f 0xf2
+
+# CHECK: vmov.i64 q6, #0xff00ff00ff
+0x75 0xce 0x81 0xf2
+
+# CHECK: vmvn.i32 d0, #0x0
+0x30 0x00 0x80 0xf2
+
+# CHECK: vmul.f32 d0, d0, d6
+0x16 0x0d 0x00 0xf3
+
+# CHECK: vneg.f32 q0, q0
+0xc0 0x07 0xb9 0xf3
+
+# CHECK: vqrdmulh.s32 d0, d0, d3[1]
+0x63 0x0d 0xa0 0xf2
+
+# CHECK: vrshr.s32 d0, d0, #16
+0x10 0x02 0xb0 0xf2
+
+# CHECK: vshll.i16 q3, d1, #16
+0x01 0x63 0xb6 0xf3
+
+# CHECK: vsri.32 q15, q0, #1
+0x50 0xe4 0xff 0xf3
+
+# CHECK: vtbx.8 d18, {d4, d5, d6}, d7
+0x47 0x2a 0xf4 0xf3
+
+# CHECK: vmov.f32 s0, #5.000000e-01
+0x00 0x0a 0xb6 0xee
+
+# CHECK: vmov.f32 s0, #1.328125e-01
+0x01 0x0a 0xb4 0xee
+
+# CHECK: vmov.f64 d0, #5.000000e-01
+0x00 0x0b 0xb6 0xee
+
+# CHECK: vpop {d8}
+0x02 0x8b 0xbd 0xec
+
+# CHECK: vorr.i32 q15, #0x4f0000
+0x5f 0xe5 0xc4 0xf2
+
+# CHECK: vbic.i32 q2, #0xa900
+0x79 0x43 0x82 0xf3
+
+# CHECK: vst2.32 {d16, d18}, [r2, :64], r2
+0x92 0x9 0x42 0xf4
+
+# CHECK: vmov.s8 r0, d8[1]
+0x30 0x0b 0x58 0xee
+
+# CHECK: vmov r1, r0, d11
+0x1b 0x1b 0x50 0xec
+
+# CHECK: usada8mi r8, r9, r5, r9
+0x19 0x95 0x88 0x47
+
+# CHECK: vext.32 q4, q2, q1, #1
+0x42 0x84 0xb4 0xf2