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author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-09-18 19:40:39 +0000 |
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committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-09-18 19:40:39 +0000 |
commit | 15d14cb83df480dd4aab6435873ca50254891a2d (patch) | |
tree | e5ef7d77a1e7703b625d5de82d50c26e4944cdc7 /lib/Target/Sparc/CMakeLists.txt |
Create R600 Branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@164161 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/CMakeLists.txt')
-rw-r--r-- | lib/Target/Sparc/CMakeLists.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/lib/Target/Sparc/CMakeLists.txt b/lib/Target/Sparc/CMakeLists.txt new file mode 100644 index 00000000000..efb10db4c0a --- /dev/null +++ b/lib/Target/Sparc/CMakeLists.txt @@ -0,0 +1,29 @@ +set(LLVM_TARGET_DEFINITIONS Sparc.td) + +tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel) +tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv) +add_public_tablegen_target(SparcCommonTableGen) + +add_llvm_target(SparcCodeGen + DelaySlotFiller.cpp + FPMover.cpp + SparcAsmPrinter.cpp + SparcInstrInfo.cpp + SparcISelDAGToDAG.cpp + SparcISelLowering.cpp + SparcFrameLowering.cpp + SparcMachineFunctionInfo.cpp + SparcRegisterInfo.cpp + SparcSubtarget.cpp + SparcTargetMachine.cpp + SparcSelectionDAGInfo.cpp + ) + +add_dependencies(LLVMSparcCodeGen intrinsics_gen) + +add_subdirectory(TargetInfo) +add_subdirectory(MCTargetDesc) |