diff options
| author | Christian König <deathsimple@vodafone.de> | 2012-11-29 11:12:35 +0100 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-11-29 17:06:06 +0000 |
| commit | a89dbc11a43e2030f965989e1f2478d2a44a8f50 (patch) | |
| tree | 1a12a93ea41fb74cb87be60d2801404b75ce8170 | |
| parent | 856623aeff833e3cfa9592a585f8d30b6d507db8 (diff) | |
AMDGPU: Fix S_*_SAVEEXEC_B64 defines
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-and-tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
| -rw-r--r-- | lib/Target/AMDGPU/SIInstructions.td | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index 97d2faa0c8b..afa76d4638f 100644 --- a/lib/Target/AMDGPU/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td @@ -46,14 +46,20 @@ def S_GETPC_B64 : SOP1_64 <0x0000001f, "S_GETPC_B64", []>; def S_SETPC_B64 : SOP1_64 <0x00000020, "S_SETPC_B64", []>; def S_SWAPPC_B64 : SOP1_64 <0x00000021, "S_SWAPPC_B64", []>; def S_RFE_B64 : SOP1_64 <0x00000022, "S_RFE_B64", []>; + +let hasSideEffects = 1, Uses = [EXEC], Defs = [EXEC] in { + def S_AND_SAVEEXEC_B64 : SOP1_64 <0x00000024, "S_AND_SAVEEXEC_B64", []>; def S_OR_SAVEEXEC_B64 : SOP1_64 <0x00000025, "S_OR_SAVEEXEC_B64", []>; def S_XOR_SAVEEXEC_B64 : SOP1_64 <0x00000026, "S_XOR_SAVEEXEC_B64", []>; -////def S_ANDN2_SAVEEXEC_B64 : SOP1_ANDN2 <0x00000027, "S_ANDN2_SAVEEXEC_B64", []>; -////def S_ORN2_SAVEEXEC_B64 : SOP1_ORN2 <0x00000028, "S_ORN2_SAVEEXEC_B64", []>; +def S_ANDN2_SAVEEXEC_B64 : SOP1_64 <0x00000027, "S_ANDN2_SAVEEXEC_B64", []>; +def S_ORN2_SAVEEXEC_B64 : SOP1_64 <0x00000028, "S_ORN2_SAVEEXEC_B64", []>; def S_NAND_SAVEEXEC_B64 : SOP1_64 <0x00000029, "S_NAND_SAVEEXEC_B64", []>; def S_NOR_SAVEEXEC_B64 : SOP1_64 <0x0000002a, "S_NOR_SAVEEXEC_B64", []>; def S_XNOR_SAVEEXEC_B64 : SOP1_64 <0x0000002b, "S_XNOR_SAVEEXEC_B64", []>; + +} // End hasSideEffects = 1 + def S_QUADMASK_B32 : SOP1_32 <0x0000002c, "S_QUADMASK_B32", []>; def S_QUADMASK_B64 : SOP1_64 <0x0000002d, "S_QUADMASK_B64", []>; def S_MOVRELS_B32 : SOP1_32 <0x0000002e, "S_MOVRELS_B32", []>; |