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| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2014-11-12 15:04:09 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2014-11-12 15:04:09 +0200 |
| commit | 45de0a35a66d017aa026cee467edaf71e29b6f75 (patch) | |
| tree | d9e9340fcf34ef5c793922cefc52768fccb385dc | |
| parent | b2a2d3a02202d9156ff87e01f692952854f067bc (diff) | |
wip
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index e9aa071ba8..19487cc538 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -2054,6 +2054,8 @@ fs_generator::generate_code(const cfg_t *cfg) assert(dst.type == BRW_REGISTER_TYPE_F); assert(src[0].type == BRW_REGISTER_TYPE_F); assert(src[1].type == BRW_REGISTER_TYPE_F); + brw_set_default_mask_control(p, true); + brw_set_default_access_mode(p, BRW_ALIGN_16); dst.width = BRW_WIDTH_4; /* Tell the hardware that there are in fact single precision floats * but that each occupies 64-bits. @@ -2073,6 +2075,8 @@ fs_generator::generate_code(const cfg_t *cfg) src[1].vstride = (inst->exec_size == 16) ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8; brw_MOV(p, dst, src[1]); + brw_set_default_mask_control(p, false); + brw_set_default_access_mode(p, BRW_ALIGN_1); break; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: |