diff options
author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2015-04-28 12:52:57 +0300 |
---|---|---|
committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2015-05-04 01:05:38 +0300 |
commit | 2700dcc7f7aaf9dfb29c1884f32e82e039293513 (patch) | |
tree | 1ea39a6a4b0746ae8dbafb76c9457d72fff7b3d7 | |
parent | 3baeb70308e4c3bfaee3b3d54bc039c392029e48 (diff) |
i965: Use stage specific uniform update trickeruniform_updates_by_stage
Note that all the states involved continue to follow
_NEW_PROGRAM_CONSTANTS as well. This is needed to support older
logic dealing with constants that are not managed through the
uniform-interface.
Now that i965 driver provides the uniform update callback,
mesa core won't emit _NEW_PROGRAM_CONSTANTS for uniform updates
anymore but allows the driver callback to set its own trickers.
The callback records each uniform update and the pipeline batch
emission mechanism in turn checks these against the currently
bound program binaries.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 35 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_gs_state.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_wm_state.c | 6 |
8 files changed, 59 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c index a323e4d903..b3c5377466 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c @@ -49,7 +49,7 @@ brw_upload_gs_pull_constants(struct brw_context *brw) /* BRW_NEW_GS_PROG_DATA */ const struct brw_stage_prog_data *prog_data = &brw->gs.prog_data->base.base; - /* _NEW_PROGRAM_CONSTANTS */ + /* _NEW_PROGRAM_CONSTANTS | BRW_NEW_GS_PULL_CONST_VALUE */ brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program.Base, stage_state, prog_data, false); } @@ -59,7 +59,8 @@ const struct brw_tracked_state brw_gs_pull_constants = { .mesa = _NEW_PROGRAM_CONSTANTS, .brw = BRW_NEW_BATCH | BRW_NEW_GEOMETRY_PROGRAM | - BRW_NEW_GS_PROG_DATA, + BRW_NEW_GS_PROG_DATA | + BRW_NEW_GS_PULL_CONST_VALUE, }, .emit = brw_upload_gs_pull_constants, }; diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 8d521b346d..ce6fb9fa27 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -307,6 +307,8 @@ void brwInitFragProgFuncs( struct dd_function_table *functions ) functions->DeleteProgram = brwDeleteProgram; functions->ProgramStringNotify = brwProgramStringNotify; + functions->UniformChange = brw_uniform_change; + functions->NewShader = brw_new_shader; functions->LinkShader = brw_link_shader; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 39ae612760..95d1ad3556 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -644,7 +644,7 @@ check_and_emit_atom(struct brw_context *brw, } } -static void +static bool check_programs(struct brw_context *brw) { const struct gl_context *ctx = &brw->ctx; @@ -663,6 +663,30 @@ check_programs(struct brw_context *brw) brw->vertex_program = ctx->VertexProgram._Current; brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM; } + + if (brw->gen < 6) + return false; + + const uint64_t new_programs_needed = BRW_NEW_FRAGMENT_PROGRAM | + BRW_NEW_GEOMETRY_PROGRAM | + BRW_NEW_VERTEX_PROGRAM; + + /* If any of the stages require new program to be uploaded one cannot + * check for uniform updates until the program data is available. Hence + * tell the caller to do it instead once the progam is uploaded. + */ + if (brw->ctx.NewDriverState & new_programs_needed) + return ctx->Shader.ActiveProgram; + + /* All stages have their programs already loaded. Check if any uniform + * values need updates in any of the stages. + */ + if (brw->ctx.Shader.ActiveProgram) + brw->ctx.NewDriverState |= brw_flush_uniform_updates( + ctx, ctx->Shader.ActiveProgram); + + /* And tell the caller that the uniforms are already flushed. */ + return false; } static inline void @@ -680,8 +704,8 @@ brw_upload_pipeline_state(struct brw_context *brw, ctx->NewDriverState = ~0ull; } - if (pipeline == BRW_RENDER_PIPELINE) - check_programs(brw); + const bool need_uniform_flush = + pipeline == BRW_RENDER_PIPELINE ? check_programs(brw) : false; if (brw->meta_in_progress != _mesa_meta_in_progress(ctx)) { brw->meta_in_progress = _mesa_meta_in_progress(ctx); @@ -703,6 +727,11 @@ brw_upload_pipeline_state(struct brw_context *brw, intel_emit_post_sync_nonzero_flush(brw); brw_upload_programs(brw, pipeline); + + if (need_uniform_flush) + brw->ctx.NewDriverState |= brw_flush_uniform_updates( + ctx, ctx->Shader.ActiveProgram); + merge_ctx_state(brw, &state); const struct brw_tracked_state *atoms = diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c index f82a62b485..8ac1323903 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c @@ -72,7 +72,9 @@ brw_upload_pull_constants(struct brw_context *brw, */ _mesa_load_state_parameters(&brw->ctx, prog->Parameters); - /* BRW_NEW_*_PROG_DATA | _NEW_PROGRAM_CONSTANTS */ + /* BRW_NEW_*_PROG_DATA | _NEW_PROGRAM_CONSTANTS | + * BRW_NEW_VS_PULL_CONST_VALUE + */ uint32_t size = prog_data->nr_pull_params * 4; drm_intel_bo *const_bo = NULL; uint32_t const_offset; @@ -123,7 +125,7 @@ brw_upload_vs_pull_constants(struct brw_context *brw) dword_pitch = brw->vs.prog_data->base.simd8; - /* _NEW_PROGRAM_CONSTANTS */ + /* _NEW_PROGRAM_CONSTANTS | BRW_NEW_VS_UNIFORM_VALUE */ brw_upload_pull_constants(brw, BRW_NEW_VS_CONSTBUF, &vp->program.Base, stage_state, prog_data, dword_pitch); } @@ -133,7 +135,8 @@ const struct brw_tracked_state brw_vs_pull_constants = { .mesa = _NEW_PROGRAM_CONSTANTS, .brw = BRW_NEW_BATCH | BRW_NEW_VERTEX_PROGRAM | - BRW_NEW_VS_PROG_DATA, + BRW_NEW_VS_PROG_DATA | + BRW_NEW_VS_PULL_CONST_VALUE, }, .emit = brw_upload_vs_pull_constants, }; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 25fb543041..728c48fb67 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -510,7 +510,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw) /* BRW_NEW_FS_PROG_DATA */ struct brw_stage_prog_data *prog_data = &brw->wm.prog_data->base; - /* _NEW_PROGRAM_CONSTANTS */ + /* _NEW_PROGRAM_CONSTANTS | BRW_NEW_FS_PULL_CONST_VALUE */ brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &fp->program.Base, stage_state, prog_data, true); } @@ -520,7 +520,8 @@ const struct brw_tracked_state brw_wm_pull_constants = { .mesa = _NEW_PROGRAM_CONSTANTS, .brw = BRW_NEW_BATCH | BRW_NEW_FRAGMENT_PROGRAM | - BRW_NEW_FS_PROG_DATA, + BRW_NEW_FS_PROG_DATA | + BRW_NEW_FS_PULL_CONST_VALUE, }, .emit = brw_upload_wm_pull_constants, }; diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c index eb4c58601f..5dc74ca1d2 100644 --- a/src/mesa/drivers/dri/i965/gen6_gs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c @@ -58,7 +58,8 @@ const struct brw_tracked_state gen6_gs_push_constants = { .brw = BRW_NEW_BATCH | BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_GS_PROG_DATA | - BRW_NEW_PUSH_CONSTANT_ALLOCATION, + BRW_NEW_PUSH_CONSTANT_ALLOCATION | + BRW_NEW_GS_PUSH_CONST_VALUE, }, .emit = gen6_upload_gs_push_constants, }; @@ -203,7 +204,8 @@ const struct brw_tracked_state gen6_gs_state = { BRW_NEW_FF_GS_PROG_DATA | BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_GS_PROG_DATA | - BRW_NEW_PUSH_CONSTANT_ALLOCATION, + BRW_NEW_PUSH_CONSTANT_ALLOCATION | + BRW_NEW_GS_PUSH_CONST_VALUE, }, .emit = upload_gs_state, }; diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c index 35d10ef877..d11cef6f81 100644 --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c @@ -76,7 +76,7 @@ gen6_upload_push_constants(struct brw_context *brw, STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float)); - /* _NEW_PROGRAM_CONSTANTS + /* _NEW_PROGRAM_CONSTANTS, BRW_NEW_VS_PUSH_CONST_VALUE * * Also _NEW_TRANSFORM -- we may reference clip planes other than as a * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS @@ -152,7 +152,8 @@ const struct brw_tracked_state gen6_vs_push_constants = { .brw = BRW_NEW_BATCH | BRW_NEW_PUSH_CONSTANT_ALLOCATION | BRW_NEW_VERTEX_PROGRAM | - BRW_NEW_VS_PROG_DATA, + BRW_NEW_VS_PROG_DATA | + BRW_NEW_VS_PUSH_CONST_VALUE, }, .emit = gen6_upload_vs_push_constants, }; @@ -260,7 +261,8 @@ const struct brw_tracked_state gen6_vs_state = { BRW_NEW_CONTEXT | BRW_NEW_PUSH_CONSTANT_ALLOCATION | BRW_NEW_VERTEX_PROGRAM | - BRW_NEW_VS_PROG_DATA, + BRW_NEW_VS_PROG_DATA | + BRW_NEW_VS_PUSH_CONST_VALUE, }, .emit = upload_vs_state, }; diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c index 8e673a4204..a4049b09d9 100644 --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c @@ -60,7 +60,8 @@ const struct brw_tracked_state gen6_wm_push_constants = { .brw = BRW_NEW_BATCH | BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | - BRW_NEW_PUSH_CONSTANT_ALLOCATION, + BRW_NEW_PUSH_CONSTANT_ALLOCATION | + BRW_NEW_FS_PUSH_CONST_VALUE, }, .emit = gen6_upload_wm_push_constants, }; @@ -301,7 +302,8 @@ const struct brw_tracked_state gen6_wm_state = { .brw = BRW_NEW_BATCH | BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | - BRW_NEW_PUSH_CONSTANT_ALLOCATION, + BRW_NEW_PUSH_CONSTANT_ALLOCATION | + BRW_NEW_FS_PUSH_CONST_VALUE, }, .emit = upload_wm_state, }; |