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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2017-05-19 16:02:27 +0300
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2017-05-20 22:08:04 +0300
commitfc471fec15d9523e5252670f88a824c4ae6592b6 (patch)
tree28bec04f06d79c23b206b927ea6b9d46d8803e8e
parent28e77e01dcc61ac8b73644068785cca91b3b8a63 (diff)
i965/gen4: Tell briefly how workaround depth gets reconcileddepth_state_cleanup
CC: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 85050ce003..fe021b0243 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -165,6 +165,13 @@ rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb,
perf_debug("HW workaround: blitting depth level %d to a temporary "
"to fix alignment (depth tile offset %d,%d)\n",
irb->mt_level, tile_x, tile_y);
+
+ /* Create new miptree representing single "irb->mt_level" only and
+ * make renderbuffer point this instead of the full miptree. Note that
+ * the underlying texture object still carries reference to the original
+ * full mipmap tree and intel_finalize_mipmap_tree() will eventually
+ * merge these two.
+ */
intel_renderbuffer_move_to_temp(brw, irb, invalidate);
/* Get the new offset. */