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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2020-12-03 10:10:22 +0100
committerMarge Bot <eric+marge@anholt.net>2020-12-07 11:42:17 +0000
commit562dd79bfa6c19af871baa0464a5b12f72145d4b (patch)
treedbfe4e13b20e733af864e7caa9594c47e977c4dd
parent9a993da0ff499f3489f1d57de2c7e3b6da701e7f (diff)
radv: fix using FS sample shading if the linker optimized inputs away
During NIR linking, constant varyings might be moved to the next stage and the sample qualifier removed. shader_info::uses_sample_shading remembers if the sample qualifier was used before optimizations. No fossils-db changes on Sienna Cichlid. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7892>
-rw-r--r--src/amd/compiler/aco_instruction_selection.cpp2
-rw-r--r--src/amd/vulkan/radv_nir_to_llvm.c2
-rw-r--r--src/amd/vulkan/radv_pipeline.c2
-rw-r--r--src/amd/vulkan/radv_shader.h2
-rw-r--r--src/amd/vulkan/radv_shader_info.c13
5 files changed, 5 insertions, 16 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index e98aa3fb8f4..b73af196963 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -6907,7 +6907,7 @@ void visit_store_scratch(isel_context *ctx, nir_intrinsic_instr *instr) {
void visit_load_sample_mask_in(isel_context *ctx, nir_intrinsic_instr *instr) {
uint8_t log2_ps_iter_samples;
- if (ctx->program->info->ps.force_persample) {
+ if (ctx->program->info->ps.uses_sample_shading) {
log2_ps_iter_samples =
util_logbase2(ctx->options->key.fs.num_samples);
} else {
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 5c29c61a227..c058d945caf 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -739,7 +739,7 @@ static LLVMValueRef load_sample_mask_in(struct ac_shader_abi *abi)
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
uint8_t log2_ps_iter_samples;
- if (ctx->args->shader_info->ps.force_persample) {
+ if (ctx->args->shader_info->ps.uses_sample_shading) {
log2_ps_iter_samples =
util_logbase2(ctx->args->options->key.fs.num_samples);
} else {
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a2564ef042c..4b639f0446e 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1127,7 +1127,7 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
*
* Otherwise, sample shading is considered disabled."
*/
- if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.ps.force_persample) {
+ if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.ps.uses_sample_shading) {
ps_iter_samples = ms->num_samples;
} else {
ps_iter_samples = radv_pipeline_get_ps_iter_samples(pCreateInfo);
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 9d9491d4361..833fa84cfe0 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -303,7 +303,7 @@ struct radv_shader_info {
uint8_t num_linked_outputs;
} tes;
struct {
- bool force_persample;
+ bool uses_sample_shading;
bool needs_sample_positions;
bool writes_memory;
bool writes_z;
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 5be98548599..8147b08b845 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -162,12 +162,6 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
case nir_intrinsic_load_num_subgroups:
info->cs.uses_local_invocation_idx = true;
break;
- case nir_intrinsic_load_sample_id:
- info->ps.force_persample = true;
- break;
- case nir_intrinsic_load_sample_pos:
- info->ps.force_persample = true;
- break;
case nir_intrinsic_load_view_index:
info->needs_multiview_view_index = true;
if (nir->info.stage == MESA_SHADER_FRAGMENT)
@@ -337,7 +331,6 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
struct radv_shader_info *info)
{
unsigned attrib_count = glsl_count_attribute_slots(var->type, false);
- const struct glsl_type *type = glsl_without_array(var->type);
int idx = var->data.location;
switch (idx) {
@@ -361,11 +354,6 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
break;
}
- if (glsl_get_base_type(type) == GLSL_TYPE_FLOAT) {
- if (var->data.sample)
- info->ps.force_persample = true;
- }
-
if (var->data.compact) {
unsigned component_count = var->data.location_frac +
glsl_get_length(var->type);
@@ -657,6 +645,7 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
info->ps.early_fragment_test = nir->info.fs.early_fragment_tests;
info->ps.post_depth_coverage = nir->info.fs.post_depth_coverage;
info->ps.depth_layout = nir->info.fs.depth_layout;
+ info->ps.uses_sample_shading = nir->info.fs.uses_sample_shading;
break;
case MESA_SHADER_GEOMETRY:
info->gs.vertices_in = nir->info.gs.vertices_in;