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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-26 17:10:20 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-26 17:10:20 -0700
commit62c9072bee2272232d0ed92dc8148c48c1f10f8e (patch)
tree5c64b479af4b97cbc21db3d0a2a0afdae60d9e8f /arch/arm/mach-omap2/clock44xx_data.c
parent4b30b6f23a1a59cda29cc12566eb4f32a22a8069 (diff)
parentc2fda22207e2977d0b80eac58a9004b6f8beed6d (diff)
Merge branch 'next/fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (24 commits) ASoC: omap: McBSP: fix build breakage on OMAP1 OMAP: hwmod: fix the i2c-reset timeout during bootup I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test I2C: OMAP2+: Introduce I2C IP versioning constants I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c OMAP4: hwmod data: Change DSS main_clk scheme OMAP4: powerdomain data: Remove unsupported MPU powerdomain state OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed OMAP4: powerdomain data: Fix core mem states and missing cefuse flag OMAP2+: PM: Initialise sleep_switch to a non-valid value OMAP4: hwmod data: Modify DSS opt clocks OMAP4: iommu: fix clock name omap: iovmm: s/sg_dma_len(sg)/sg->length/ omap: iommu: fix pte programming arm: omap3: cm-t35: fix slow path warning arm: omap3: cm-t35: minor comments fixes omap: ZOOM: QUART: Request reset GPIO ...
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 5b7cab794fb9..25473a1db3e7 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1639,6 +1639,7 @@ static struct clk gpmc_ick = {
.ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
+ .flags = ENABLE_ON_INIT,
.clkdm_name = "l3_2_clkdm",
.parent = &l3_div_ck,
.recalc = &followparent_recalc,
@@ -3068,10 +3069,10 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
- CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
- CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
- CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
- CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X),
+ CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
+ CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
+ CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
+ CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X),
CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),