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authorJesse Barnes <jbarnes@virtuousgeek.org>2014-01-07 13:50:49 -0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-01-08 08:37:37 +0100
commit7ca51a3abf9e34232fcb3bff3c11befde73f8fd5 (patch)
tree2caaeedae7400e57dd2734b8435033e3ccb22d43
parentbd602544712edf72a128bc81d02f0a8051cb1372 (diff)
drm/i915: check modeset state after a pipe_set_base if using fastboot
Otherwise we won't check the state until the next DPMS transition, which may never happen. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b6c76a911624..c9761b096a86 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10002,6 +10002,16 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
ret = intel_pipe_set_base(set->crtc,
set->x, set->y, set->fb);
+ /*
+ * In the fastboot case this may be our only check of the
+ * state after boot. It would be better to only do it on
+ * the first update, but we don't have a nice way of doing that
+ * (and really, set_config isn't used much for high freq page
+ * flipping, so increasing its cost here shouldn't be a big
+ * deal).
+ */
+ if (i915_fastboot && ret == 0)
+ intel_modeset_check_state(set->crtc->dev);
}
if (ret) {