diff options
Diffstat (limited to 'arch/cris/arch-v32/kernel/irq.c')
-rw-r--r-- | arch/cris/arch-v32/kernel/irq.c | 61 |
1 files changed, 28 insertions, 33 deletions
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index b6241198fb98..2ed48ae3d313 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c @@ -97,7 +97,11 @@ extern void breakh_BUG(void); /* * Build the IRQ handler stubs using macros from irq.h. */ +#ifdef CONFIG_CRIS_MACH_ARTPEC3 +BUILD_TIMER_IRQ(0x31, 0) +#else BUILD_IRQ(0x31) +#endif BUILD_IRQ(0x32) BUILD_IRQ(0x33) BUILD_IRQ(0x34) @@ -123,7 +127,11 @@ BUILD_IRQ(0x47) BUILD_IRQ(0x48) BUILD_IRQ(0x49) BUILD_IRQ(0x4a) +#ifdef CONFIG_ETRAXFS +BUILD_TIMER_IRQ(0x4b, 0) +#else BUILD_IRQ(0x4b) +#endif BUILD_IRQ(0x4c) BUILD_IRQ(0x4d) BUILD_IRQ(0x4e) @@ -199,25 +207,20 @@ block_irq(int irq, int cpu) unsigned long flags; spin_lock_irqsave(&irq_lock, flags); - if (irq - FIRST_IRQ < 32) + /* Remember, 1 let thru, 0 block. */ + if (irq - FIRST_IRQ < 32) { intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0); - else - intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], - rw_mask, 1); - - /* Remember; 1 let thru, 0 block. */ - if (irq - FIRST_IRQ < 32) intr_mask &= ~(1 << (irq - FIRST_IRQ)); - else - intr_mask &= ~(1 << (irq - FIRST_IRQ - 32)); - - if (irq - FIRST_IRQ < 32) REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0, intr_mask); - else + } else { + intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], + rw_mask, 1); + intr_mask &= ~(1 << (irq - FIRST_IRQ - 32)); REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 1, intr_mask); + } spin_unlock_irqrestore(&irq_lock, flags); } @@ -228,26 +231,20 @@ unblock_irq(int irq, int cpu) unsigned long flags; spin_lock_irqsave(&irq_lock, flags); - if (irq - FIRST_IRQ < 32) + /* Remember, 1 let thru, 0 block. */ + if (irq - FIRST_IRQ < 32) { intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0); - else - intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], - rw_mask, 1); - - /* Remember; 1 let thru, 0 block. */ - if (irq - FIRST_IRQ < 32) intr_mask |= (1 << (irq - FIRST_IRQ)); - else - intr_mask |= (1 << (irq - FIRST_IRQ - 32)); - - if (irq - FIRST_IRQ < 32) REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0, intr_mask); - else + } else { + intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], + rw_mask, 1); + intr_mask |= (1 << (irq - FIRST_IRQ - 32)); REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 1, intr_mask); - + } spin_unlock_irqrestore(&irq_lock, flags); } @@ -280,8 +277,7 @@ out: return cpu; } -void -mask_irq(int irq) +void crisv32_mask_irq(int irq) { int cpu; @@ -289,8 +285,7 @@ mask_irq(int irq) block_irq(irq, cpu); } -void -unmask_irq(int irq) +void crisv32_unmask_irq(int irq) { unblock_irq(irq, irq_cpu(irq)); } @@ -298,23 +293,23 @@ unmask_irq(int irq) static unsigned int startup_crisv32_irq(unsigned int irq) { - unmask_irq(irq); + crisv32_unmask_irq(irq); return 0; } static void shutdown_crisv32_irq(unsigned int irq) { - mask_irq(irq); + crisv32_mask_irq(irq); } static void enable_crisv32_irq(unsigned int irq) { - unmask_irq(irq); + crisv32_unmask_irq(irq); } static void disable_crisv32_irq(unsigned int irq) { - mask_irq(irq); + crisv32_mask_irq(irq); } static void ack_crisv32_irq(unsigned int irq) |