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authorThierry Reding <treding@nvidia.com>2013-12-16 09:59:52 +0100
committerThierry Reding <treding@nvidia.com>2014-06-03 15:04:19 +0200
commitb9544878bec2fcc5c3106cc91a348fa9e326870e (patch)
tree1b20d23bfefca4c8d771a35732bdd1229377a6eb
parent7716f33c9c8d360e2ee49a8db691cadde2efe704 (diff)
ARM: tegra: Add missing clock-names properties
clock-names properties are only listed when necessary to differentiate between multiple clocks. The same rule doesn't apply to the reset-names property, though, so add the clock-names property where it's missing for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi24
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi21
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi35
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi37
4 files changed, 117 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index fdc559ab2db..90982679c16 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -22,6 +22,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
@@ -35,6 +36,7 @@
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_GR2D>;
+ clock-names = "2d";
resets = <&tegra_car 21>;
reset-names = "2d";
};
@@ -43,6 +45,7 @@
compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";
reg = <0x54180000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
+ clock-names = "3d";
resets = <&tegra_car 24>;
reset-names = "3d";
};
@@ -148,6 +151,7 @@
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_TIMER>;
+ clock-names = "timer";
};
tegra_car: clock@60006000 {
@@ -193,6 +197,7 @@
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
+ clock-names = "dma";
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
@@ -240,6 +245,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTA>;
+ clock-names = "serial";
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
@@ -253,6 +259,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTB>;
+ clock-names = "serial";
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
@@ -266,6 +273,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTC>;
+ clock-names = "serial";
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
@@ -279,6 +287,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTD>;
+ clock-names = "serial";
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
@@ -291,6 +300,7 @@
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA114_CLK_PWM>;
+ clock-names = "pwm";
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
@@ -466,6 +476,7 @@
reg = <0x7000e000 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_RTC>;
+ clock-names = "rtc";
};
kbc@7000e200 {
@@ -473,6 +484,7 @@
reg = <0x7000e200 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_KBC>;
+ clock-names = "kbc";
resets = <&tegra_car 36>;
reset-names = "kbc";
status = "disabled";
@@ -544,6 +556,7 @@
reg = <0x70080300 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA114_CLK_I2S0>;
+ clock-names = "i2s";
resets = <&tegra_car 30>;
reset-names = "i2s";
status = "disabled";
@@ -554,6 +567,7 @@
reg = <0x70080400 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA114_CLK_I2S1>;
+ clock-names = "i2s";
resets = <&tegra_car 11>;
reset-names = "i2s";
status = "disabled";
@@ -564,6 +578,7 @@
reg = <0x70080500 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA114_CLK_I2S2>;
+ clock-names = "i2s";
resets = <&tegra_car 18>;
reset-names = "i2s";
status = "disabled";
@@ -574,6 +589,7 @@
reg = <0x70080600 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA114_CLK_I2S3>;
+ clock-names = "i2s";
resets = <&tegra_car 101>;
reset-names = "i2s";
status = "disabled";
@@ -584,6 +600,7 @@
reg = <0x70080700 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA114_CLK_I2S4>;
+ clock-names = "i2s";
resets = <&tegra_car 102>;
reset-names = "i2s";
status = "disabled";
@@ -594,6 +611,7 @@
compatible = "nvidia,tegra114-mipi";
reg = <0x700e3000 0x100>;
clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
+ clock-names = "mipi-cal";
#nvidia,mipi-calibrate-cells = <1>;
};
@@ -602,6 +620,7 @@
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -612,6 +631,7 @@
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -622,6 +642,7 @@
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -632,6 +653,7 @@
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -643,6 +665,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>;
+ clock-names = "usb";
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,phy = <&phy1>;
@@ -676,6 +699,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>;
+ clock-names = "usb";
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6e6bc4e8185..9a51dfa295b 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -17,6 +17,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
@@ -112,6 +113,7 @@
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TIMER>;
+ clock-names = "timer";
};
tegra_car: clock@0,60006000 {
@@ -174,6 +176,7 @@
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_APBDMA>;
+ clock-names = "dma";
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
@@ -199,6 +202,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTA>;
+ clock-names = "serial";
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
@@ -212,6 +216,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTB>;
+ clock-names = "serial";
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
@@ -225,6 +230,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTC>;
+ clock-names = "serial";
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
@@ -238,6 +244,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTD>;
+ clock-names = "serial";
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
@@ -250,6 +257,7 @@
reg = <0x0 0x7000a000 0x0 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA124_CLK_PWM>;
+ clock-names = "pwm";
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
@@ -440,6 +448,7 @@
reg = <0x0 0x7000e000 0x0 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_RTC>;
+ clock-names = "rtc";
};
pmc@0,7000e400 {
@@ -454,6 +463,7 @@
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -464,6 +474,7 @@
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -474,6 +485,7 @@
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -484,6 +496,7 @@
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -546,6 +559,7 @@
reg = <0x0 0x70301000 0x0 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA124_CLK_I2S0>;
+ clock-names = "i2s";
resets = <&tegra_car 30>;
reset-names = "i2s";
status = "disabled";
@@ -556,6 +570,7 @@
reg = <0x0 0x70301100 0x0 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA124_CLK_I2S1>;
+ clock-names = "i2s";
resets = <&tegra_car 11>;
reset-names = "i2s";
status = "disabled";
@@ -566,6 +581,7 @@
reg = <0x0 0x70301200 0x0 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA124_CLK_I2S2>;
+ clock-names = "i2s";
resets = <&tegra_car 18>;
reset-names = "i2s";
status = "disabled";
@@ -576,6 +592,7 @@
reg = <0x0 0x70301300 0x0 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA124_CLK_I2S3>;
+ clock-names = "i2s";
resets = <&tegra_car 101>;
reset-names = "i2s";
status = "disabled";
@@ -586,6 +603,7 @@
reg = <0x0 0x70301400 0x0 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA124_CLK_I2S4>;
+ clock-names = "i2s";
resets = <&tegra_car 102>;
reset-names = "i2s";
status = "disabled";
@@ -598,6 +616,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USBD>;
+ clock-names = "usb";
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,phy = <&phy1>;
@@ -632,6 +651,7 @@
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB2>;
+ clock-names = "usb";
resets = <&tegra_car 58>;
reset-names = "usb";
nvidia,phy = <&phy2>;
@@ -666,6 +686,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB3>;
+ clock-names = "usb";
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index a7ddf70df50..81815416e6d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -23,6 +23,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
@@ -36,6 +37,7 @@
reg = <0x54040000 0x00040000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_MPE>;
+ clock-names = "mpe";
resets = <&tegra_car 60>;
reset-names = "mpe";
};
@@ -45,6 +47,7 @@
reg = <0x54080000 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_VI>;
+ clock-names = "vi";
resets = <&tegra_car 20>;
reset-names = "vi";
};
@@ -54,6 +57,7 @@
reg = <0x540c0000 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_EPP>;
+ clock-names = "epp";
resets = <&tegra_car 19>;
reset-names = "epp";
};
@@ -63,6 +67,7 @@
reg = <0x54100000 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_ISP>;
+ clock-names = "isp";
resets = <&tegra_car 23>;
reset-names = "isp";
};
@@ -72,6 +77,7 @@
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_GR2D>;
+ clock-names = "2d";
resets = <&tegra_car 21>;
reset-names = "2d";
};
@@ -80,6 +86,7 @@
compatible = "nvidia,tegra20-gr3d";
reg = <0x54140000 0x00040000>;
clocks = <&tegra_car TEGRA20_CLK_GR3D>;
+ clock-names = "3d";
resets = <&tegra_car 24>;
reset-names = "3d";
};
@@ -135,6 +142,7 @@
reg = <0x542c0000 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_TVO>;
+ clock-names = "tvo";
status = "disabled";
};
@@ -142,6 +150,7 @@
compatible = "nvidia,tegra20-dsi";
reg = <0x542c0000 0x00040000>;
clocks = <&tegra_car TEGRA20_CLK_DSI>;
+ clock-names = "dsi";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
@@ -154,6 +163,7 @@
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA20_CLK_TWD>;
+ clock-names = "twd";
};
intc: interrupt-controller@50041000 {
@@ -181,6 +191,7 @@
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_TIMER>;
+ clock-names = "timer";
};
tegra_car: clock@60006000 {
@@ -210,6 +221,7 @@
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_APBDMA>;
+ clock-names = "dma";
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
@@ -254,6 +266,7 @@
reg = <0x70002000 0x200>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_AC97>;
+ clock-names = "ac97";
resets = <&tegra_car 3>;
reset-names = "ac97";
dmas = <&apbdma 12>, <&apbdma 12>;
@@ -266,6 +279,7 @@
reg = <0x70002800 0x200>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_I2S1>;
+ clock-names = "i2s";
resets = <&tegra_car 11>;
reset-names = "i2s";
dmas = <&apbdma 2>, <&apbdma 2>;
@@ -278,6 +292,7 @@
reg = <0x70002a00 0x200>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_I2S2>;
+ clock-names = "i2s";
resets = <&tegra_car 18>;
reset-names = "i2s";
dmas = <&apbdma 1>, <&apbdma 1>;
@@ -298,6 +313,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTA>;
+ clock-names = "serial";
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
@@ -311,6 +327,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTB>;
+ clock-names = "serial";
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
@@ -324,6 +341,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTC>;
+ clock-names = "serial";
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
@@ -337,6 +355,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTD>;
+ clock-names = "serial";
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
@@ -350,6 +369,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTE>;
+ clock-names = "serial";
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
@@ -362,6 +382,7 @@
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA20_CLK_PWM>;
+ clock-names = "pwm";
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
@@ -372,6 +393,7 @@
reg = <0x7000e000 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_RTC>;
+ clock-names = "rtc";
};
i2c@7000c000 {
@@ -397,6 +419,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA20_CLK_SPI>;
+ clock-names = "spi";
resets = <&tegra_car 43>;
reset-names = "spi";
dmas = <&apbdma 11>, <&apbdma 11>;
@@ -459,6 +482,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA20_CLK_SBC1>;
+ clock-names = "spi";
resets = <&tegra_car 41>;
reset-names = "spi";
dmas = <&apbdma 15>, <&apbdma 15>;
@@ -473,6 +497,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA20_CLK_SBC2>;
+ clock-names = "spi";
resets = <&tegra_car 44>;
reset-names = "spi";
dmas = <&apbdma 16>, <&apbdma 16>;
@@ -487,6 +512,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA20_CLK_SBC3>;
+ clock-names = "spi";
resets = <&tegra_car 46>;
reset-names = "spi";
dmas = <&apbdma 17>, <&apbdma 17>;
@@ -501,6 +527,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA20_CLK_SBC4>;
+ clock-names = "spi";
resets = <&tegra_car 68>;
reset-names = "spi";
dmas = <&apbdma 18>, <&apbdma 18>;
@@ -513,6 +540,7 @@
reg = <0x7000e200 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_KBC>;
+ clock-names = "kbc";
resets = <&tegra_car 36>;
reset-names = "kbc";
status = "disabled";
@@ -614,6 +642,7 @@
phy_type = "utmi";
nvidia,has-legacy-mode;
clocks = <&tegra_car TEGRA20_CLK_USBD>;
+ clock-names = "usb";
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,needs-double-reset;
@@ -647,6 +676,7 @@
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "ulpi";
clocks = <&tegra_car TEGRA20_CLK_USB2>;
+ clock-names = "usb";
resets = <&tegra_car 58>;
reset-names = "usb";
nvidia,phy = <&phy2>;
@@ -670,6 +700,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA20_CLK_USB3>;
+ clock-names = "usb";
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
@@ -700,6 +731,7 @@
reg = <0xc8000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -710,6 +742,7 @@
reg = <0xc8000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -720,6 +753,7 @@
reg = <0xc8000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -730,6 +764,7 @@
reg = <0xc8000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index dec4fc82390..e88e477bfb2 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -100,6 +100,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
@@ -113,6 +114,7 @@
reg = <0x54040000 0x00040000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_MPE>;
+ clock-names = "mpe";
resets = <&tegra_car 60>;
reset-names = "mpe";
};
@@ -122,6 +124,7 @@
reg = <0x54080000 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_VI>;
+ clock-names = "vi";
resets = <&tegra_car 20>;
reset-names = "vi";
};
@@ -131,6 +134,7 @@
reg = <0x540c0000 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_EPP>;
+ clock-names = "epp";
resets = <&tegra_car 19>;
reset-names = "epp";
};
@@ -140,6 +144,7 @@
reg = <0x54100000 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_ISP>;
+ clock-names = "isp";
resets = <&tegra_car 23>;
reset-names = "isp";
};
@@ -149,6 +154,7 @@
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_GR2D>;
+ clock-names = "2d";
resets = <&tegra_car 21>;
reset-names = "2d";
};
@@ -215,6 +221,7 @@
reg = <0x542c0000 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_TVO>;
+ clock-names = "tvo";
status = "disabled";
};
@@ -222,6 +229,7 @@
compatible = "nvidia,tegra30-dsi";
reg = <0x54300000 0x00040000>;
clocks = <&tegra_car TEGRA30_CLK_DSIA>;
+ clock-names = "dsi";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
@@ -234,6 +242,7 @@
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA30_CLK_TWD>;
+ clock-names = "twd";
};
intc: interrupt-controller@50041000 {
@@ -263,6 +272,7 @@
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_TIMER>;
+ clock-names = "timer";
};
tegra_car: clock@60006000 {
@@ -308,6 +318,7 @@
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_APBDMA>;
+ clock-names = "dma";
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
@@ -355,6 +366,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTA>;
+ clock-names = "serial";
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
@@ -368,6 +380,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTB>;
+ clock-names = "serial";
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
@@ -381,6 +394,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTC>;
+ clock-names = "serial";
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
@@ -394,6 +408,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTD>;
+ clock-names = "serial";
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
@@ -407,6 +422,7 @@
reg-shift = <2>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTE>;
+ clock-names = "serial";
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
@@ -419,6 +435,7 @@
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA30_CLK_PWM>;
+ clock-names = "pwm";
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
@@ -429,6 +446,7 @@
reg = <0x7000e000 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_RTC>;
+ clock-names = "rtc";
};
i2c@7000c000 {
@@ -518,6 +536,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC1>;
+ clock-names = "spi";
resets = <&tegra_car 41>;
reset-names = "spi";
dmas = <&apbdma 15>, <&apbdma 15>;
@@ -532,6 +551,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC2>;
+ clock-names = "spi";
resets = <&tegra_car 44>;
reset-names = "spi";
dmas = <&apbdma 16>, <&apbdma 16>;
@@ -546,6 +566,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC3>;
+ clock-names = "spi";
resets = <&tegra_car 46>;
reset-names = "spi";
dmas = <&apbdma 17>, <&apbdma 17>;
@@ -560,6 +581,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC4>;
+ clock-names = "spi";
resets = <&tegra_car 68>;
reset-names = "spi";
dmas = <&apbdma 18>, <&apbdma 18>;
@@ -574,6 +596,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC5>;
+ clock-names = "spi";
resets = <&tegra_car 104>;
reset-names = "spi";
dmas = <&apbdma 27>, <&apbdma 27>;
@@ -588,6 +611,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA30_CLK_SBC6>;
+ clock-names = "spi";
resets = <&tegra_car 106>;
reset-names = "spi";
dmas = <&apbdma 28>, <&apbdma 28>;
@@ -600,6 +624,7 @@
reg = <0x7000e200 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_KBC>;
+ clock-names = "kbc";
resets = <&tegra_car 36>;
reset-names = "kbc";
status = "disabled";
@@ -668,6 +693,7 @@
reg = <0x70080300 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA30_CLK_I2S0>;
+ clock-names = "i2s";
resets = <&tegra_car 30>;
reset-names = "i2s";
status = "disabled";
@@ -678,6 +704,7 @@
reg = <0x70080400 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA30_CLK_I2S1>;
+ clock-names = "i2s";
resets = <&tegra_car 11>;
reset-names = "i2s";
status = "disabled";
@@ -688,6 +715,7 @@
reg = <0x70080500 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA30_CLK_I2S2>;
+ clock-names = "i2s";
resets = <&tegra_car 18>;
reset-names = "i2s";
status = "disabled";
@@ -698,6 +726,7 @@
reg = <0x70080600 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA30_CLK_I2S3>;
+ clock-names = "i2s";
resets = <&tegra_car 101>;
reset-names = "i2s";
status = "disabled";
@@ -708,6 +737,7 @@
reg = <0x70080700 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA30_CLK_I2S4>;
+ clock-names = "i2s";
resets = <&tegra_car 102>;
reset-names = "i2s";
status = "disabled";
@@ -719,6 +749,7 @@
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -729,6 +760,7 @@
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -739,6 +771,7 @@
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -749,6 +782,7 @@
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -760,6 +794,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USBD>;
+ clock-names = "usb";
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,needs-double-reset;
@@ -795,6 +830,7 @@
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>;
+ clock-names = "usb";
resets = <&tegra_car 58>;
reset-names = "usb";
nvidia,phy = <&phy2>;
@@ -829,6 +865,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB3>;
+ clock-names = "usb";
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 08:30:32 +0000