summaryrefslogtreecommitdiff
path: root/shaders/ps
diff options
context:
space:
mode:
authorBen Widawsky <ben@bwidawsk.net>2012-06-28 22:42:58 -0700
committerBen Widawsky <ben@bwidawsk.net>2012-06-28 22:52:04 -0700
commit2234f87a0852f321a6f85e8fcd6fbb6866f9c944 (patch)
tree8b9aee530dc965021d6ec36e0e8c503f7cc2e3ed /shaders/ps
parentab0460eaac85fdd66328ccba511519397cea0ddb (diff)
lib: add a gen7 rendercopy
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'shaders/ps')
-rw-r--r--shaders/ps/README1
-rw-r--r--shaders/ps/blit.g7a66
-rw-r--r--shaders/ps/neg1_test.g7a9
3 files changed, 76 insertions, 0 deletions
diff --git a/shaders/ps/README b/shaders/ps/README
new file mode 100644
index 00000000..b196d025
--- /dev/null
+++ b/shaders/ps/README
@@ -0,0 +1 @@
+These files are here for reference only.
diff --git a/shaders/ps/blit.g7a b/shaders/ps/blit.g7a
new file mode 100644
index 00000000..deeedcc5
--- /dev/null
+++ b/shaders/ps/blit.g7a
@@ -0,0 +1,66 @@
+/* Assemble with ".../intel-gen4asm/src/intel-gen4asm -g 7" */
+
+
+/* Move pixels into g10-g13. The pixel shaader does not load what you want. It
+ * loads the input data for a plane function to calculate what you want. The
+ * following is boiler plate code to move our normalized texture coordinates
+ * (u,v) into g10-g13. It does this 4 subspans (16 pixels) at a time.
+ *
+ * This should do the same thing, but it doesn't work for some reason.
+ * pln(16) g10 g6<0,1,0>F g2<8,8,1>F { align1 };
+ * pln(16) g12 g6.16<1>F g2<8,8,1>F { align1 };
+ */
+/* U */
+pln (8) g10<1>F g6.0<0,1,0>F g2.0<8,8,1>F { align1 }; /* pixel 0-7 */
+pln (8) g11<1>F g6.0<0,1,0>F g4.0<8,8,1>F { align1 }; /* pixel 8-15 */
+/* V */
+pln (8) g12<1>F g6.16<0,1,0> g2.0<8,8,1>F { align1 }; /* pixel 0-7 */
+pln (8) g13<1>F g6.16<0,1,0> g4.0<8,8,1>F { align1 }; /* pixel 8-15 */
+
+
+/* Next the we want the sampler to fetch the src texture (ie. src buffer). This
+ * is done with a pretty simple send message. The output goes to g112, which is
+ * exactly what we're supposed to use in our final send message.
+ * In intel-gen4asm, we should end up parsed by the following rule:
+ * predicate SEND execsize dst sendleadreg sndopr directsrcoperand instoptions
+ *
+ * Send message descriptor:
+ * 28:25 = message len = 4 // our 4 registers have 16 pixels
+ * 24:20 = response len = 8 // Each pixel is RGBA32, so we need 8 registers
+ * 19:19 = header present = 0
+ * 18:17 = SIMD16 = 2
+ * 16:12 = TYPE = 0 (regular sample)
+ * 11:08 = Sampler index = ignored/0
+ * 7:0 = binding table index = src = 1
+ * 0x8840001
+ *
+ * Send message extra descriptor
+ * 5:5 = End of Thread = 0
+ * 3:0 = Target Function ID = SFID_SAMPLER (2)
+ * 0x2
+ */
+
+send(16) g112 g10 0x2 0x8840001 { align1 };
+
+/* g112-g119 now contains the sample source input, and all we must do is write
+ * it out to the destination render target. This is done with the send message
+ * as well. The only extra bits are to terminate the pixel shader.
+ *
+ * Send message descriptor:
+ * 28:25 = message len = 8 // 16 pixels RGBA32
+ * 24:20 = response len = 0
+ * 19:19 = header present = 0
+ * 17:14 = message type = Render Target Write (12)
+ * 12:12 = Last Render Target Select = 1
+ * 10:08 = Message Type = SIMD16 (0)
+ * 07:00 = Binding Table Index = dest = 0
+ * 0x10031000
+ *
+ * Send message extra descriptor
+ * 5:5 = End of Thread = 1
+ * 3:0 = Target Function ID = SFID_DP_RC (5)
+ * 0x25
+ */
+send(16) null g112 0x25 0x10031000 { align1, EOT };
+
+/* vim: set ft=c ts=4 sw=2 tw=80 et: */
diff --git a/shaders/ps/neg1_test.g7a b/shaders/ps/neg1_test.g7a
new file mode 100644
index 00000000..744a7690
--- /dev/null
+++ b/shaders/ps/neg1_test.g7a
@@ -0,0 +1,9 @@
+mov(8) g112:UD 0x3f800000:UD { align1 };
+mov(8) g113:UD 0x3f800000:UD { align1 };
+mov(8) g114:UD 0x3f800000:UD { align1 };
+mov(8) g115:UD 0x3f800000:UD { align1 };
+mov(8) g116:UD 0x3f800000:UD { align1 };
+mov(8) g117:UD 0x3f800000:UD { align1 };
+mov(8) g118:UD 0x3f800000:UD { align1 };
+mov(8) g119:UD 0x3f800000:UD { align1 };
+send(16) null g112 0x25 0x10031000 { align1, EOT };