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authorRodrigo Vivi <rodrigo.vivi@intel.com>2017-01-04 15:38:07 -0800
committerRodrigo Vivi <rodrigo.vivi@intel.com>2017-06-30 08:35:13 -0700
commitcf3bcf89453372bab70e2be3280be9473f280af1 (patch)
tree65f2bc02884eeeac5749d9ad247c488854765c19
parent91fc531022203edf768fc6885c230544bd1b3621 (diff)
lib/cnl: Add Cannonlake PCI IDs for Y-skus.
By the Spec all CNL Y skus are 2+2, i.e. GT2. This is a copy of merged i915's commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.") v2: Based on Anusha's kernel clean-up. Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
-rw-r--r--lib/i915_pciids.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 8109e73f..8a10a451 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -352,8 +352,17 @@
INTEL_VGA_DEVICE(0x5A42, info), \
INTEL_VGA_DEVICE(0x5A4A, info)
+#define INTEL_CNL_Y_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x5A51, info), \
+ INTEL_VGA_DEVICE(0x5A59, info), \
+ INTEL_VGA_DEVICE(0x5A41, info), \
+ INTEL_VGA_DEVICE(0x5A49, info), \
+ INTEL_VGA_DEVICE(0x5A71, info), \
+ INTEL_VGA_DEVICE(0x5A79, info)
+
#define INTEL_CNL_IDS(info) \
- INTEL_CNL_U_GT2_IDS(info)
+ INTEL_CNL_U_GT2_IDS(info), \
+ INTEL_CNL_Y_GT2_IDS(info)
#define INTEL_CFL_U_IDS(info) \
INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \