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path: root/include/linux/mtd/spi-nor.h
AgeCommit message (Expand)AuthorFilesLines
2021-02-05mtd: spi-nor: Add Global Block Unlock commandTudor Ambarus1-0/+1
2020-12-07mtd: spi-nor: Fix multiple typosJonathan Neuschäfer1-1/+1
2020-11-09mtd: spi-nor: core: perform a Soft Reset on shutdownPratyush Yadav1-0/+2
2020-11-09mtd: spi-nor: add support for DTR protocolPratyush Yadav1-13/+38
2020-05-28mtd: spi-nor: Fix SPI NOR acronymTudor Ambarus1-4/+4
2020-04-28mtd: spi-nor: fix kernel-doc for spi_nor::spimemSergei Shtylyov1-1/+1
2020-04-28mtd: spi-nor: fix kernel-doc for spi_nor::infoSergei Shtylyov1-1/+1
2020-04-28mtd: spi-nor: fix kernel-doc for spi_nor::reg_protoSergei Shtylyov1-1/+1
2020-04-28mtd: spi-nor: fix kernel-doc for spi_nor::mtdSergei Shtylyov1-1/+1
2020-04-28mtd: spi-nor: fix kernel-doc for 'struct spi_nor'Sergei Shtylyov1-4/+4
2020-04-20mtd: spi-nor: move #define SPINOR_OP_WRDISergei Shtylyov1-1/+1
2020-03-24mtd: spi-nor: Add SR 4bit block protection supportJungseung Lee1-0/+2
2020-03-17mtd: spi-nor: Trim what is exposed in spi-nor.hTudor Ambarus1-254/+6
2020-03-17mtd: spi-nor: Drop the MFR definitionsTudor Ambarus1-17/+0
2020-03-17mtd: spi-nor: Add the concept of SPI NOR manufacturer driverBoris Brezillon1-0/+8
2020-03-16mtd: spi-nor: Emphasise which is the generic set_4byte_addr_mode() methodTudor Ambarus1-2/+2
2020-02-19mtd: spi-nor: use spi-mem dirmap APISergei Shtylyov1-0/+6
2020-02-17mtd: spi-nor: introduce SR_BP_SHIFT defineJungseung Lee1-0/+2
2020-01-14mtd: spi-nor: remove unused enum spi_nor_opsMichael Walle1-10/+2
2019-12-23mtd: spi-nor: Support TB selection using SR bit 6Jungseung Lee1-0/+1
2019-12-23mtd: spi-nor: Rename SR_TB to indicate the bit usedJungseung Lee1-1/+2
2019-11-11mtd: spi-nor: Set default Quad Enable method for ISSI flashesSagar Shrikant Kadam1-0/+1
2019-11-11mtd: spi-nor: Rename Quad Enable methodsTudor Ambarus1-1/+1
2019-11-11mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1Tudor Ambarus1-3/+1
2019-11-11mtd: spi-nor: Rework the disabling of block write protectionTudor Ambarus1-3/+0
2019-11-11mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()Tudor Ambarus1-0/+3
2019-10-23mtd: spi-nor: Introduce 'struct spi_nor_controller_ops'Tudor Ambarus1-21/+30
2019-08-28mtd: spi-nor: Add a ->setup() methodTudor Ambarus1-0/+5
2019-08-28mtd: spi-nor: Add a ->convert_addr() methodBoris Brezillon1-7/+10
2019-08-28mtd: spi-nor: Rework the SPI NOR lock/unlock logicBoris Brezillon1-7/+16
2019-08-28mtd: spi-nor: Create a ->set_4byte() methodBoris Brezillon1-0/+2
2019-08-28mtd: spi-nor: Move erase_map to 'struct spi_nor_flash_parameter'Tudor Ambarus1-3/+5
2019-08-28mtd: spi-nor: Drop quad_enable() from 'struct spi-nor'Tudor Ambarus1-2/+0
2019-08-28mtd: spi-nor: Regroup flash parameter and settingsTudor Ambarus1-75/+164
2019-08-28mtd: spi-nor: Remove unused macroTudor Ambarus1-1/+0
2019-08-12mtd: spi-nor: fix description for int (*flash_is_locked)()Tudor Ambarus1-1/+1
2019-08-12mtd: spi-nor: Rework hwcaps selection for the spi-mem caseBoris Brezillon1-0/+14
2019-08-12mtd: spi-nor: Move m25p80 code in spi-nor.cBoris Brezillon1-0/+3
2019-08-12mtd: spi-nor: always use bounce buffer for register read/writesVignesh Raghavendra1-2/+5
2019-06-23mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashesTudor Ambarus1-0/+3
2019-02-21mtd: spi-nor: Fix wrong abbreviation HWCPASBean Huo1-1/+1
2019-01-17mtd: spi-nor: add opcodes for octal Read/Write commandsYogesh Narayan Gaur1-4/+12
2018-12-10mtd: spi-nor: parse SFDP 4-byte Address Instruction TableCyrille Pitchen1-0/+1
2018-12-10mtd: spi-nor: Add an SPDX tag to spi-nor.{c,h}Boris Brezillon1-5/+1
2018-12-10mtd: spi-nor: Add the SNOR_F_4B_OPCODES flagBoris Brezillon1-0/+1
2018-12-10mtd: spi-nor: add macros related to MICRON flashYogesh Narayan Gaur1-1/+2
2018-10-08mtd: spi-nor: parse SFDP Sector Map Parameter TableTudor Ambarus1-0/+12
2018-10-08mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memoriesTudor Ambarus1-0/+107
2018-08-01mtd: spi-nor: only apply reset hacks to broken hardwareBrian Norris1-0/+1
2018-04-21mtd: spi-nor: clear Winbond Extended Address Reg on switch to 3-byte addressing.NeilBrown1-0/+2
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