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path: root/drivers/mmc/host/mmci.h
AgeCommit message (Expand)AuthorFilesLines
2018-10-09mmc: mmci: add stm32 sdmmc variantLudovic Barre1-0/+5
2018-10-09mmc: mmci: add stm32 sdmmc registersLudovic Barre1-0/+56
2018-10-09mmc: mmci: add clock divider for stm32 sdmmcLudovic Barre1-0/+2
2018-10-09mmc: mmci: add optional reset propertyLudovic Barre1-0/+2
2018-10-09mmc: mmci: add variant property to not read datacntLudovic Barre1-0/+3
2018-10-09mmc: mmci: add variant property to write datactrl before commandLudovic Barre1-0/+2
2018-10-09mmc: mmci: add variant property to define irq pio maskLudovic Barre1-1/+4
2018-10-09mmc: mmci: add variant property to define dpsm bitLudovic Barre1-0/+2
2018-10-09mmc: mmci: add variant properties to define cpsm & cmdresp bitsLudovic Barre1-0/+8
2018-10-09mmc: mmci: expand startbiterr to irqmask and error checkLudovic Barre1-3/+3
2018-10-09mmc: mmci: add datactrl block size variant propertyLudovic Barre1-0/+2
2018-10-09mmc: mmci: add set_clk/pwrreg callbacksLudovic Barre1-0/+5
2018-10-09mmc: mmci: add validate_data callbackLudovic Barre1-0/+1
2018-10-09mmc: mmci: add dma_error callbackLudovic Barre1-0/+2
2018-10-09mmc: mmci: add dma_finalize callbackLudovic Barre1-1/+2
2018-10-09mmc: mmci: add dma_start callbackLudovic Barre1-0/+2
2018-10-09mmc: mmci: add get_next_data callbackLudovic Barre1-0/+2
2018-10-09mmc: mmci: add prepare/unprepare_data callbacksLudovic Barre1-0/+8
2018-10-09mmc: mmci: introduce dma_priv pointer to mmci_hostLudovic Barre1-15/+4
2018-10-09mmc: mmci: create common mmci_dma_setup/releaseLudovic Barre1-1/+6
2018-10-08mmc: mmci: Change struct members from bool to u8Ludovic Barre1-16/+16
2018-10-08mmc: mmci: internalize dma_inprogress into mmci dma functionsLudovic Barre1-2/+0
2018-08-01mmc: mmci: Add and implement a ->dma_setup() callback for qcom dmlUlf Hansson1-0/+1
2018-07-30mmc: mmci: Initial support to manage variant specific callbacksUlf Hansson1-1/+79
2018-01-18mmc: mmci: Add support for setting pad type via pinctrlPatrice Chotard1-0/+5
2018-01-18mmc: mmci: Don't pretend all variants to have MMCIMASK1 registerPatrice Chotard1-0/+1
2017-02-13mmc: core/mmci: restore pre/post_req behaviourLinus Walleij1-1/+2
2016-11-29mmc: mmci: refactor ST Micro busy detectionLinus Walleij1-1/+1
2016-11-29mmc: mmci: clean up header definesLinus Walleij1-31/+38
2014-07-09mmc: mmci: Add Qcom specific rx_fifocnt logic.Srinivas Kandagatla1-0/+1
2014-07-09mmc: mmci: add explicit clk controlSrinivas Kandagatla1-0/+2
2014-07-09mmc: mmci: Add Qualcomm specific register defines.Srinivas Kandagatla1-0/+17
2014-05-12mmc: mmci: Enforce DT for signal direction and feedback clockUlf Hansson1-0/+11
2014-05-12mmc: mmci: Convert to the mmc gpio APIUlf Hansson1-3/+0
2014-04-09Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+2
2014-02-23mmc: mmci: Enable support for busy detection for ux500 variantUlf Hansson1-0/+2
2014-02-12ARM: 7956/1: mmci: rename some extended flagsLinus Walleij1-4/+5
2013-09-19ARM: 7831/1: mmc: mmci: Adapt to new pinctrl handlingUlf Hansson1-4/+0
2013-05-23ARM: 7726/1: mmc: mmci: Add card_busy function to improve UHS card supportUlf Hansson1-0/+2
2013-05-23ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL registerUlf Hansson1-0/+1
2013-05-23ARM: 7721/1: mmc: mmci: Fixup regulator handling for vqmmcUlf Hansson1-0/+1
2013-01-28ARM: 7631/1: mmc: mmci: Add new VE MMCI variantPawel Moll1-0/+2
2013-01-08ARM: 7620/1: mmc: mmci: Convert to use mmc_regulator_get_supplyUlf Hansson1-1/+0
2012-11-04ARM: 7562/2: MMCI: fetch pinctrl handle and set default stateLinus Walleij1-0/+4
2012-02-02ARM: 7280/1: mmc: mmci: Cache MMCICLOCK and MMCIPOWER registerUlf Hansson1-1/+2
2012-01-20ARM: 7218/1: mmc: mmci: Provide option to configure bus signal directionUlf Hansson1-10/+0
2012-01-20ARM: 7215/1: mmc: mmci: Increase max_segs from 16 to 128Ulf Hansson1-1/+1
2011-07-20mmc: mmci: implement pre_req() and post_req()Per Forlin1-0/+8
2011-07-06ARM: 6980/1: mmci: use StartBitErr to detect bad connectionsLinus Walleij1-1/+4
2011-05-11ARM: 6785/1: mmci: separate out ST Micro register definesLinus Walleij1-14/+27
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