~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2019-11-11	clk: tegra: Rename sor0_lvds to sor0_out	Thierry Reding	1	-1/+1
2019-11-11	clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC	Thierry Reding	1	-1/+1
2018-07-25	clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks	Peter De-Schrijver	1	-2/+0
2017-11-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-0/+1
2017-11-02	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	Greg Kroah-Hartman	1	-0/+1
2017-11-01	clk: tegra: Add AHB DMA clock entry	Dmitry Osipenko	1	-0/+1
2017-04-04	clk: tegra: Add missing Tegra210 clocks	Peter De Schrijver	1	-0/+6
2017-03-20	clk: tegra: Define Tegra210 DMIC clocks	Peter De Schrijver	1	-1/+4
2017-03-20	clk: tegra: Define Tegra210 DMIC sync clocks	Peter De Schrijver	1	-0/+6
2017-03-20	clk: tegra: Add CEC clock	Peter De Schrijver	1	-0/+1
2017-03-20	clk: tegra: Fix ISP clock modelling	Peter De Schrijver	1	-0/+1
2016-06-17	clk: tegra: Squash sor1 safe/brick/src into a single mux	Thierry Reding	1	-1/+0
2016-04-28	clk: tegra: Add sor_safe clock	Thierry Reding	1	-0/+1
2016-04-28	clk: tegra: Add dpaux1 clock	Thierry Reding	1	-0/+1
2016-02-02	clk: tegra: Add the APB2APE audio clock on Tegra210	Jon Hunter	1	-0/+1
2015-12-17	clk: tegra: Add support for Tegra210 clocks	Rhyland Klein	1	-0/+7
2015-11-20	clk: tegra: periph: Add new periph clks and muxes for Tegra210	Rhyland Klein	1	-1/+67
2015-02-02	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	Mark Zhang	1	-2/+0
2014-05-22	clk: tegra: Fix xusb_hs_src clock hierarchy	Andrew Bresticker	1	-0/+1
2014-02-17	clk: tegra: fix sdmmc clks on Tegra1x4	Andrew Bresticker	1	-0/+4
2013-11-26	clk: tegra124: Add common clk IDs to clk-id.h	Peter De Schrijver	1	-0/+22
2013-11-26	clk: tegra: add header for common tegra clock IDs	Peter De Schrijver	1	-0/+213