~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2021-06-27	clk: ingenic: Support overriding PLLs M/N/OD calc algorithm	Paul Cercueil	1	-0/+3
2021-06-27	clk: ingenic: Remove pll_info.no_bypass_bit	Paul Cercueil	1	-4/+3
2021-06-27	clk: Support bypassing dividers	Paul Cercueil	1	-0/+2
2020-05-28	clk: Ingenic: Adjust cgu code to make it compatible with X1830.	周琰杰 (Zhou Yanjie)	1	-0/+4
2019-07-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-0/+4
2019-06-25	clk: ingenic: Add missing header in cgu.h	Paul Cercueil	1	-0/+1
2019-06-07	clk: ingenic: Add support for divider tables	Paul Cercueil	1	-0/+3
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	Thomas Gleixner	1	-10/+1
2019-02-22	clk: ingenic: Fix doc of ingenic_cgu_div_info	Paul Cercueil	1	-1/+1
2018-06-15	docs: Fix some broken references	Mauro Carvalho Chehab	1	-1/+1
2018-06-01	clk: ingenic: Support specifying "wait for clock stable" delay	Paul Cercueil	1	-0/+2
2018-06-01	clk: ingenic: Add support for clocks whose gate bit is inverted	Paul Cercueil	1	-0/+2
2018-01-18	clk: ingenic: support PLLs with no bypass bit	Paul Cercueil	1	-0/+2
2018-01-18	clk: ingenic: Use const pointer to clk_ops in struct	Paul Cercueil	1	-1/+1
2017-11-03	Update MIPS email addresses	Paul Burton	1	-1/+1
2016-05-12	clk: ingenic: Allow divider value to be divided	Harvey Hunt	1	-1/+5
2015-06-21	clk: ingenic: add driver for Ingenic SoC CGU clocks	Paul Burton	1	-0/+223