~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2023-08-14	clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz	Ahmad Fatoum	1	-2/+0
2023-08-14	clk: imx: pll14xx: align pdiv with reference manual	Marco Felsch	1	-6/+5
2023-02-21	clk: imx: pll14xx: fix recalc_rate for negative kdiv	Kevin Groeneveld	1	-1/+1
2022-11-22	clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x	Marek Vasut	1	-0/+2
2022-03-04	clk: imx: pll14xx: Support dynamic rates	Sascha Hauer	1	-17/+126
2022-03-04	clk: imx: pll14xx: Add pr_fmt	Sascha Hauer	1	-6/+6
2022-03-04	clk: imx: pll14xx: explicitly return lowest rate	Sascha Hauer	1	-2/+2
2022-03-04	clk: imx: pll14xx: name variables after usage	Sascha Hauer	1	-21/+21
2022-03-04	clk: imx: pll14xx: consolidate rate calculation	Sascha Hauer	1	-33/+26
2022-03-04	clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP	Sascha Hauer	1	-21/+19
2022-03-04	clk: imx: pll14xx: Drop wrong shifting	Sascha Hauer	1	-2/+2
2022-03-04	clk: imx: pll14xx: Use register defines consistently	Sascha Hauer	1	-24/+25
2020-11-01	clk: imx: remove unneeded semicolon	Tom Rix	1	-1/+1
2020-08-22	clk: imx: Explicitly include bits.h	Anson Huang	1	-1/+1
2020-08-22	clk: imx: Support building i.MX common clock driver as module	Anson Huang	1	-0/+5
2020-04-29	clk: imx: pll14xx: Add the device as argument when registering	Abel Vesa	1	-4/+4
2020-02-24	clk: imx: pll14xx: Return error if pll type is invalid	Anson Huang	1	-0/+2
2020-02-13	clk: imx: pll14xx: Add new frequency entries for pll1443x table	Anson Huang	1	-0/+2
2020-01-31	Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', '...	Stephen Boyd	1	-9/+20
2019-12-23	clk: imx: clk-pll14xx: Switch to clk_hw based API	Peng Fan	1	-9/+13
2019-12-11	clk: imx: pll14xx: fix clk_pll14xx_wait_lock	Peng Fan	1	-1/+1
2019-12-09	clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE	Leonard Crestez	1	-0/+7
2019-10-14	clk: imx: clk-pll14xx: Make two variables static	YueHaibing	1	-2/+2
2019-10-06	clk: imx8mn: Use common 1443X/1416X PLL clock structure	Anson Huang	1	-0/+2
2019-10-06	clk: imx8mm: Move 1443X/1416X PLL clock structure to common place	Anson Huang	1	-0/+30
2019-10-06	clk: imx: pll14xx: Fix quick switch of S/K parameter	Leonard Crestez	1	-32/+8
2019-09-17	clk: imx: clk-pll14xx: unbypass PLL by default	Peng Fan	1	-0/+5
2019-09-17	clk: imx: pll14xx: avoid glitch when set rate	Peng Fan	1	-1/+21
2019-05-07	Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-...	Stephen Boyd	1	-4/+2
2019-04-25	clk: imx: pll14xx: drop unused variable	Peng Fan	1	-4/+2
2019-04-12	clk: imx: Fix PLL_1416X not rounding rates	Leonard Crestez	1	-1/+1
2019-02-21	clk: imx: Add PLLs driver for imx8mm soc	Bai Ping	1	-0/+392