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path: root/arch/x86/kernel/amd_nb.c
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2012-07-22Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-0/+1
2012-06-07x86, amd_nb: Export model 0x10 and later PCI idBorislav Petkov1-0/+1
2012-06-06x86/debug: Add KERN_<LEVEL> to bare printks, convert printks to pr_<level>Joe Perches1-4/+6
2012-01-11Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jb...Linus Torvalds1-0/+31
2012-01-06x86/PCI: amd: factor out MMCONFIG discoveryBjorn Helgaas1-0/+31
2011-12-21x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'Kevin Winchester1-6/+2
2011-03-31x86, amd-nb: Rename CPU PCI id define for F4Borislav Petkov1-1/+1
2011-03-17Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds1-1/+1
2011-03-17PCI: Rename CPU PCI id defineBorislav Petkov1-1/+1
2011-03-03x86, amd-nb: Misc cleanliness fixesBorislav Petkov1-8/+10
2011-02-10x86: Adjust section placement in AMD northbridge related codeJan Beulich1-3/+4
2011-02-07x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUsHans Rosenfeld1-0/+63
2011-01-26x86, amd: Extend AMD northbridge caching code to support "Link Control" devicesHans Rosenfeld1-2/+9
2011-01-26x86, amd: Enable L3 cache index disable on family 0x15Hans Rosenfeld1-0/+3
2011-01-11x86: Use PCI method for enabling AMD extended config space before MSR methodJan Beulich1-0/+7
2010-11-18x86, cacheinfo: Cleanup L3 cache index disable supportHans Rosenfeld1-0/+10
2010-11-18x86, amd-nb: Cleanup AMD northbridge caching codeHans Rosenfeld1-47/+62
2010-11-18x86, amd-nb: Complete the rename of AMD NB and related codeHans Rosenfeld1-36/+36
2010-10-01x86, amd_nb: Enable GART support for AMD family 0x15 CPUsAndreas Herrmann1-1/+3
2010-09-20x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NBAndreas Herrmann1-0/+145
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