~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2023-11-05	riscv: Improve PTDUMP to show RSW with non-zero value	Yu Chien Peter Lin	1	-2/+2
2023-02-02	riscv/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE	David Hildenbrand	1	-0/+3
2022-05-11	riscv: add RISC-V Svpbmt extension support	Heiko Stuebner	1	-4/+0
2022-05-11	riscv: Fix accessing pfn bits in PTEs for non-32bit variants	Heiko Stuebner	1	-6/+0
2022-01-07	riscv/mm: Adjust PAGE_PROT_NONE to comply with THP semantics	Nanyong Sun	1	-1/+1
2021-05-22	riscv: mm: add _PAGE_LEAF macro	Nanyong Sun	1	-0/+5
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2019-02-11	riscv: Add pte bit to distinguish swap from invalid	Stefan O'Rear	1	-0/+6
2018-06-07	mm: introduce ARCH_HAS_PTE_SPECIAL	Laurent Dufour	1	-3/+0
2017-09-26	RISC-V: Paging and MMU	Palmer Dabbelt	1	-0/+48