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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-10-12 16:01:52 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-10-18 13:02:58 -0400
commit1de3866f6d7a53dbee0ebe7d71eac738fb90972f (patch)
treed79039fb0aada13874529f334047e16fb98a4eb7 /include/memory/renesas-rpc-if.h
parent5192481f908e576be42bd39ec12979b79e11f7e0 (diff)
memory: renesas-rpc-if: Add support for R-Car Gen4
The SPI Multi I/O Bus Controller (RPC-IF) on R-Car Gen4 SoCs is very similar to the RPC-IF on R-Car Gen3 SoCs. It does support four instead of three bits of strobe timing adjustment (STRTIM), and thus requires a new mask and new settings. Inspired by a patch in the BSP by Cong Dang. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/4d0824bf5ed0fb95c51cd36f9a3f0f562b1a6bf8.1665583089.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'include/memory/renesas-rpc-if.h')
-rw-r--r--include/memory/renesas-rpc-if.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/memory/renesas-rpc-if.h b/include/memory/renesas-rpc-if.h
index 9c0ad64b8d29..862eff613dc7 100644
--- a/include/memory/renesas-rpc-if.h
+++ b/include/memory/renesas-rpc-if.h
@@ -59,6 +59,7 @@ struct rpcif_op {
enum rpcif_type {
RPCIF_RCAR_GEN3,
+ RPCIF_RCAR_GEN4,
RPCIF_RZ_G2L,
};