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authorPatrisious Haddad <phaddad@nvidia.com>2023-09-20 13:07:43 +0300
committerLeon Romanovsky <leon@kernel.org>2023-09-26 12:38:50 +0300
commitb28ad32442bec2f0d9cb660d7d698a1a53c13d08 (patch)
tree8ad22224afbef5739d91647bc589f01f863d9baf /include/linux/mlx5
parent948f0bf5ad6ac1e5f19f6aa8e7da4a950d66b661 (diff)
IB/mlx5: Rename 400G_8X speed to comply to naming convention
Rename 400G_8X speed to comply to naming convention. Signed-off-by: Patrisious Haddad <phaddad@nvidia.com> Reviewed-by: Mark Zhang <markzhang@nvidia.com> Link: https://lore.kernel.org/r/ac98447cac8379a43fbdb36d56e5fb2b741a97ff.1695204156.git.leon@kernel.org Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/port.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h
index 794001ebd003..26092c78a985 100644
--- a/include/linux/mlx5/port.h
+++ b/include/linux/mlx5/port.h
@@ -115,7 +115,7 @@ enum mlx5e_ext_link_mode {
MLX5E_100GAUI_1_100GBASE_CR_KR = 11,
MLX5E_200GAUI_4_200GBASE_CR4_KR4 = 12,
MLX5E_200GAUI_2_200GBASE_CR2_KR2 = 13,
- MLX5E_400GAUI_8 = 15,
+ MLX5E_400GAUI_8_400GBASE_CR8 = 15,
MLX5E_400GAUI_4_400GBASE_CR4_KR4 = 16,
MLX5E_800GAUI_8_800GBASE_CR8_KR8 = 19,
MLX5E_EXT_LINK_MODES_NUMBER,