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author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2020-11-30 15:09:24 +0530 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-12-28 12:15:14 -0600 |
commit | c4df37fe186de4df8895a7a4793f5221eda6e5ae (patch) | |
tree | 7049e1829417257f3c863336cfe6f8aaed918b41 /include/linux/jhash.h | |
parent | 916c0c05521a52f13283ad3600793fc79516ff31 (diff) |
soc: qcom: llcc-qcom: Add support for SM8250 SoC
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'include/linux/jhash.h')
0 files changed, 0 insertions, 0 deletions