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authorClark Wang <xiaoning.wang@nxp.com>2019-01-07 07:47:43 +0000
committerMark Brown <broonie@kernel.org>2019-01-07 15:18:13 +0000
commita15dc3d657fa2df08d1adbed926050314b5f4ba7 (patch)
tree1e9f4dc40afbfc1c8de635d1b80137c70b60dc6f /drivers/spi/spi-fsl-lpspi.c
parent6a130448498c151d31f1fb6f3003f5cf37b829e0 (diff)
spi: lpspi: Fix CLK pin becomes low before one transfer
Remove Reset operation in fsl_lpspi_config(). This RST may cause both CLK and CS pins go from high to low level under cs-gpio mode. Add fsl_lpspi_reset() function after one message transfer to clear all flags in use. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-fsl-lpspi.c')
-rw-r--r--drivers/spi/spi-fsl-lpspi.c24
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index d0b2d551cc43..391863914043 100644
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -268,10 +268,6 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi)
u32 temp;
int ret;
- temp = CR_RST;
- writel(temp, fsl_lpspi->base + IMX7ULP_CR);
- writel(0, fsl_lpspi->base + IMX7ULP_CR);
-
if (!fsl_lpspi->is_slave) {
ret = fsl_lpspi_set_bitrate(fsl_lpspi);
if (ret)
@@ -362,6 +358,24 @@ static int fsl_lpspi_wait_for_completion(struct spi_controller *controller)
return 0;
}
+static int fsl_lpspi_reset(struct fsl_lpspi_data *fsl_lpspi)
+{
+ u32 temp;
+
+ /* Disable all interrupt */
+ fsl_lpspi_intctrl(fsl_lpspi, 0);
+
+ /* W1C for all flags in SR */
+ temp = 0x3F << 8;
+ writel(temp, fsl_lpspi->base + IMX7ULP_SR);
+
+ /* Clear FIFO and disable module */
+ temp = CR_RRF | CR_RTF;
+ writel(temp, fsl_lpspi->base + IMX7ULP_CR);
+
+ return 0;
+}
+
static int fsl_lpspi_transfer_one(struct spi_controller *controller,
struct spi_device *spi,
struct spi_transfer *t)
@@ -383,6 +397,8 @@ static int fsl_lpspi_transfer_one(struct spi_controller *controller,
if (ret)
return ret;
+ fsl_lpspi_reset(fsl_lpspi);
+
return 0;
}