diff options
| author | Yang Yingliang <yangyingliang@huawei.com> | 2022-10-18 10:31:49 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-11-09 22:01:31 +0000 |
| commit | 8fbf94fea0b4e187ca9100936c5429f96b8a4e44 (patch) | |
| tree | f9237d215a010061052c5da519c0f38e5e5187ea /drivers/soc | |
| parent | 756344e7cb1afbb87da8705c20384dddd0dea233 (diff) | |
soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()
The device_node pointer returned by of_find_matching_node() with
refcount incremented, when finish using it, the refcount need be
decreased.
Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/sifive/sifive_ccache.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 98269d056728..3684f5b40a80 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -215,12 +215,16 @@ static int __init sifive_ccache_init(void) if (!np) return -ENODEV; - if (of_address_to_resource(np, 0, &res)) - return -ENODEV; + if (of_address_to_resource(np, 0, &res)) { + rc = -ENODEV; + goto err_node_put; + } ccache_base = ioremap(res.start, resource_size(&res)); - if (!ccache_base) - return -ENOMEM; + if (!ccache_base) { + rc = -ENOMEM; + goto err_node_put; + } if (of_property_read_u32(np, "cache-level", &level)) { rc = -ENOENT; @@ -243,6 +247,7 @@ static int __init sifive_ccache_init(void) goto err_free_irq; } } + of_node_put(np); ccache_config_read(); @@ -259,6 +264,8 @@ err_free_irq: free_irq(g_irq[i], NULL); err_unmap: iounmap(ccache_base); +err_node_put: + of_node_put(np); return rc; } |