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authorShaokun Zhang <zhangshaokun@hisilicon.com>2022-04-29 14:33:07 +0800
committerWill Deacon <will@kernel.org>2022-05-06 15:10:00 +0100
commit47a9ed88a4fc6c67ea7f1d65df28d2eb6a89bbbb (patch)
tree5993c7accc9614d970136fb235153ba8fe4b8606 /drivers/perf
parent23760a0144173ef398522fbcc1dbe79521b5caf9 (diff)
drivers/perf: arm_spe: Expose saturating counter to 16-bit
In order to acquire more accurate latency, Armv8.8[1] has defined the CountSize field to 16-bit saturating counters when it's 0b0011. Let's support this new feature and expose its to user under sysfs. [1] https://developer.arm.com/documentation/ddi0487/latest Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/20220429063307.63251-1-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf')
-rw-r--r--drivers/perf/arm_spe_pmu.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index d44bcc29d99c..db670b265897 100644
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -1035,6 +1035,9 @@ static void __arm_spe_pmu_dev_probe(void *info)
fallthrough;
case 2:
spe_pmu->counter_sz = 12;
+ break;
+ case 3:
+ spe_pmu->counter_sz = 16;
}
dev_info(dev,