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authorBjorn Helgaas <bhelgaas@google.com>2020-04-02 14:26:32 -0500
committerBjorn Helgaas <bhelgaas@google.com>2020-04-02 14:26:32 -0500
commiteb81b249ba059443916d6cc0cfa3e1987aa938d9 (patch)
treea82772f09a64050df12471ade29b8e7449a502ed /drivers/pci/pci.c
parent4ea40c380dd597587cb232b4d132202552dd09bc (diff)
parent757bfaa2c3515803dde9a6728bbf8c8a3c5f098a (diff)
Merge branch 'pci/enumeration'
- Add PCIe 32 GT/s speed decoding for sysfs "max_link_speed" and dmesg notes about available bandwidth (Yicong Yang) - Simplify and unify PCI bus/link speed reporting (Yicong Yang) * pci/enumeration: PCI: Add PCIE_LNKCAP2_SLS2SPEED() macro PCI: Use pci_speed_string() for all PCI/PCI-X/PCIe strings PCI: Add pci_speed_string() PCI: Add 32 GT/s decoding in some macros
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c23
1 files changed, 7 insertions, 16 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6c6e8c73fd8f..4aa46c7b0148 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -5784,19 +5784,10 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev)
* where only 2.5 GT/s and 5.0 GT/s speeds were defined.
*/
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2);
- if (lnkcap2) { /* PCIe r3.0-compliant */
- if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_32_0GB)
- return PCIE_SPEED_32_0GT;
- else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB)
- return PCIE_SPEED_16_0GT;
- else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
- return PCIE_SPEED_8_0GT;
- else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
- return PCIE_SPEED_5_0GT;
- else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
- return PCIE_SPEED_2_5GT;
- return PCI_SPEED_UNKNOWN;
- }
+
+ /* PCIe r3.0-compliant */
+ if (lnkcap2)
+ return PCIE_LNKCAP2_SLS2SPEED(lnkcap2);
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
if ((lnkcap & PCI_EXP_LNKCAP_SLS) == PCI_EXP_LNKCAP_SLS_5_0GB)
@@ -5872,14 +5863,14 @@ void __pcie_print_link_status(struct pci_dev *dev, bool verbose)
if (bw_avail >= bw_cap && verbose)
pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth (%s x%d link)\n",
bw_cap / 1000, bw_cap % 1000,
- PCIE_SPEED2STR(speed_cap), width_cap);
+ pci_speed_string(speed_cap), width_cap);
else if (bw_avail < bw_cap)
pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth, limited by %s x%d link at %s (capable of %u.%03u Gb/s with %s x%d link)\n",
bw_avail / 1000, bw_avail % 1000,
- PCIE_SPEED2STR(speed), width,
+ pci_speed_string(speed), width,
limiting_dev ? pci_name(limiting_dev) : "<unknown>",
bw_cap / 1000, bw_cap % 1000,
- PCIE_SPEED2STR(speed_cap), width_cap);
+ pci_speed_string(speed_cap), width_cap);
}
/**