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authorPrathamesh Shete <pshete@nvidia.com>2021-12-14 17:06:53 +0530
committerUlf Hansson <ulf.hansson@linaro.org>2021-12-14 13:33:10 +0100
commit4fc7261dbab139d3c64c3b618262504e16cfe7ee (patch)
treec7d7e38730ab23ccd7d71de6df8ed3014d4194f9 /drivers/mmc/core/core.c
parent2585cf9dfaaddf00b069673f27bb3f8530e2039c (diff)
mmc: sdhci-tegra: Fix switch to HS400ES mode
When CMD13 is sent after switching to HS400ES mode, the bus is operating at either MMC_HIGH_26_MAX_DTR or MMC_HIGH_52_MAX_DTR. To meet Tegra SDHCI requirement at HS400ES mode, force SDHCI interface clock to MMC_HS200_MAX_DTR (200 MHz) so that host controller CAR clock and the interface clock are rate matched. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: dfc9700cef77 ("mmc: tegra: Implement HS400 enhanced strobe") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20211214113653.4631-1-pshete@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/core/core.c')
0 files changed, 0 insertions, 0 deletions