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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:35 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:16 +0100
commitb2d5e9de77c8774a5a6cff59d928f2fa38cbc642 (patch)
treeb885cee2c0898a67d10a6652ca69c4a03ef51a11 /drivers/iio/dac
parent27f2261d16d01858b8e5baca5a1a515b040429c4 (diff)
iio: dac: ad5791: Fix alignment for DMA saftey
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 791bb52a0cd2 ("iio:ad5791: Do not store transfer buffers on the stack") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-56-jic23@kernel.org
Diffstat (limited to 'drivers/iio/dac')
-rw-r--r--drivers/iio/dac/ad5791.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/dac/ad5791.c b/drivers/iio/dac/ad5791.c
index 339564fe47d1..a4167454da81 100644
--- a/drivers/iio/dac/ad5791.c
+++ b/drivers/iio/dac/ad5791.c
@@ -95,7 +95,7 @@ struct ad5791_state {
union {
__be32 d32;
u8 d8[4];
- } data[3] ____cacheline_aligned;
+ } data[3] __aligned(IIO_DMA_MINALIGN);
};
enum ad5791_supported_device_ids {