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authorFrancisco Jerez <currojerez@riseup.net>2010-10-25 02:13:21 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-11-18 14:38:47 +1000
commit63d6fd32889c46fa40cd1631fb2a0162187311ab (patch)
treebe0e4eb6821444537c0330f872b1cef0f5907de6 /drivers/gpu
parent56ac7475350ee646f5f7316abcdf65d3be94da1c (diff)
drm/nv10-nv20: Fix instability after MPLL changes.
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_pm.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_pm.c b/drivers/gpu/drm/nouveau/nv04_pm.c
index 6a6eb697d38e..eb1c70dd82ed 100644
--- a/drivers/gpu/drm/nouveau/nv04_pm.c
+++ b/drivers/gpu/drm/nouveau/nv04_pm.c
@@ -76,6 +76,15 @@ nv04_pm_clock_set(struct drm_device *dev, void *pre_state)
reg += 4;
nouveau_hw_setpll(dev, reg, &state->calc);
+
+ if (dev_priv->card_type < NV_30 && reg == NV_PRAMDAC_MPLL_COEFF) {
+ if (dev_priv->card_type == NV_20)
+ nv_mask(dev, 0x1002c4, 0, 1 << 20);
+
+ /* Reset the DLLs */
+ nv_mask(dev, 0x1002c0, 0, 1 << 8);
+ }
+
kfree(state);
}