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authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>2016-11-01 21:12:25 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-11-07 15:16:18 +0100
commite6e3558626f6dbc16bc13587a1a981dc2446300e (patch)
treee5f4cef89e43a44b952dc0ca7fd55c48b39a0687 /drivers/clk
parent5fccac6d945b84e056b8b3b7083a151faaf2492c (diff)
clk: renesas: r8a7796: Add VIN clocks
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/renesas/r8a7796-cpg-mssr.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 18cedb40f0a8..7d298c57a3e0 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -164,6 +164,14 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
DEF_MOD("lvds", 727, R8A7796_CLK_S2D1),
+ DEF_MOD("vin7", 804, R8A7796_CLK_S0D2),
+ DEF_MOD("vin6", 805, R8A7796_CLK_S0D2),
+ DEF_MOD("vin5", 806, R8A7796_CLK_S0D2),
+ DEF_MOD("vin4", 807, R8A7796_CLK_S0D2),
+ DEF_MOD("vin3", 808, R8A7796_CLK_S0D2),
+ DEF_MOD("vin2", 809, R8A7796_CLK_S0D2),
+ DEF_MOD("vin1", 810, R8A7796_CLK_S0D2),
+ DEF_MOD("vin0", 811, R8A7796_CLK_S0D2),
DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),