diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2019-01-22 22:58:38 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-01-25 11:26:22 +0100 |
| commit | 875e8f6b0156c0ad56fd0c29c78e3f2f67ec0b16 (patch) | |
| tree | e2b9ba8178cf2e1968e869d07218164550874196 /drivers/clk/renesas/rcar-gen3-cpg.c | |
| parent | 8cb8f16c62e5ea9c77ca7d25af761f4eaea670ba (diff) | |
clk: renesas: rcar-gen3: Add spinlock
Protect the CPG register read-modify-write sequence with a spinlock.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rcar-gen3-cpg.c')
| -rw-r--r-- | drivers/clk/renesas/rcar-gen3-cpg.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 80d0808a7fe8..0818691253af 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -30,14 +30,19 @@ #define CPG_RCKCR_CKSEL BIT(15) /* RCLK Clock Source Select */ +static spinlock_t cpg_lock; + static void cpg_reg_modify(void __iomem *reg, u32 clear, u32 set) { + unsigned long flags; u32 val; + spin_lock_irqsave(&cpg_lock, flags); val = readl(reg); val &= ~clear; val |= set; writel(val, reg); + spin_unlock_irqrestore(&cpg_lock, flags); }; struct cpg_simple_notifier { @@ -615,5 +620,8 @@ int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, if (attr) cpg_quirks = (uintptr_t)attr->data; pr_debug("%s: mode = 0x%x quirks = 0x%x\n", __func__, mode, cpg_quirks); + + spin_lock_init(&cpg_lock); + return 0; } |