diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2019-08-12 14:32:53 +0200 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2019-08-20 11:51:36 +0200 |
| commit | 7cfefab6563f6e333477ec71613e1ec3bbdccc35 (patch) | |
| tree | de5e9d1b7d1b2054260f5b53a10aad2a19a2ee5d /drivers/clk/meson/axg-audio.h | |
| parent | 1d7cedbdfd4af73d5346a4289ad0c779133cb39d (diff) | |
clk: meson: axg-audio: add g12a reset support
On the g12a, the register space dedicated to the audio clock also
provides some resets. Let the clock controller register a reset
provider as well for this SoC family.
the axg SoC family does not appear to provide this feature.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/axg-audio.h')
| -rw-r--r-- | drivers/clk/meson/axg-audio.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/meson/axg-audio.h b/drivers/clk/meson/axg-audio.h index 5d972d55d6c7..c00e28b2e1a9 100644 --- a/drivers/clk/meson/axg-audio.h +++ b/drivers/clk/meson/axg-audio.h @@ -22,6 +22,7 @@ #define AUDIO_MCLK_F_CTRL 0x018 #define AUDIO_MST_PAD_CTRL0 0x01c #define AUDIO_MST_PAD_CTRL1 0x020 +#define AUDIO_SW_RESET 0x024 #define AUDIO_MST_A_SCLK_CTRL0 0x040 #define AUDIO_MST_A_SCLK_CTRL1 0x044 #define AUDIO_MST_B_SCLK_CTRL0 0x048 |