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authorAndrew F. Davis <afd@ti.com>2016-08-31 16:29:59 -0400
committerSantosh Shilimkar <ssantosh@kernel.org>2016-08-31 16:29:59 -0400
commit0884b1b3382ffe1fd5b639192c9272a82cbe2349 (patch)
treeca97b72fe5722409f15abdc008c58dfed7178b49 /arch
parent08fa198ded16cb0ec573c10f2f4a8523b319b2c6 (diff)
ARM: dts: keystone-k2g: Add keystone IRQ controller node
Add the Keystone IRQ controller IP node on K2G SoC. This allows the ARM CorePac core to receive interrupts from remote processor devices (eg: DSP) on the SoC. The IP is identical in functionality to that of the equivalent nodes on existing K2 SoCs. The only difference is the ARM INTC interrupt id/event number. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/keystone-k2g.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index fe17dc402a23..eccda9cf06dc 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -98,5 +98,13 @@
clock-frequency = <200000000>;
status = "disabled";
};
+
+ kirq0: keystone_irq@026202a0 {
+ compatible = "ti,keystone-irq";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,syscon-dev = <&devctrl 0x2a0>;
+ };
};
};