diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2010-06-19 04:08:09 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:26:13 +0100 |
commit | 544a7324198972716d486e04e77bc2622e12245b (patch) | |
tree | 486c239bf899218fcd351c47240ebfbc05eb5f14 /arch/mips/jz4740/timer.c | |
parent | 9869848d12601cdddf097a36aebe0b10dc5d177b (diff) |
MIPS: JZ4740: Add timer support
Add support for the timer/counter unit on a JZ4740 SoC. This code is used
as a common base for the JZ4740 clocksource/clockevent implementation and
PWM support.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1396/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jz4740/timer.c')
-rw-r--r-- | arch/mips/jz4740/timer.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c new file mode 100644 index 000000000000..b2c015129055 --- /dev/null +++ b/arch/mips/jz4740/timer.c @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de> + * JZ4740 platform timer support + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> + +#include "timer.h" + +#include <asm/mach-jz4740/base.h> + +void __iomem *jz4740_timer_base; + +void jz4740_timer_enable_watchdog(void) +{ + writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); +} + +void jz4740_timer_disable_watchdog(void) +{ + writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); +} + +void __init jz4740_timer_init(void) +{ + jz4740_timer_base = ioremap(JZ4740_TCU_BASE_ADDR, 0x100); + + if (!jz4740_timer_base) + panic("Failed to ioremap timer registers"); + + /* Disable all timer clocks except for those used as system timers */ + writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET); + + /* Timer irqs are unmasked by default, mask them */ + writel(0x00ff00ff, jz4740_timer_base + JZ_REG_TIMER_MASK_SET); +} |