diff options
| author | Sibi Sankar <sibis@codeaurora.org> | 2020-04-21 20:02:28 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-05-11 12:31:51 -0700 |
| commit | bec71ba243e95c54051c69b7d418ef407fe2297c (patch) | |
| tree | b614c60531afb4364670217ec20c6f1a02a5b2fa /arch/arm64/boot/dts/qcom | |
| parent | e14a15eba89af9b493c0c93e327f70291b82b9c5 (diff) | |
arm64: dts: qcom: sc7180: Update Q6V5 MSS node
Add TCSR node and update MSS node to support MSA based Modem boot on
SC7180 SoCs.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200421143228.8981-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180-idp.dts | 7 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 28 |
2 files changed, 31 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index c7c1effc07e6..4e9149d82d09 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -309,6 +309,13 @@ status = "okay"; }; +&remoteproc_mpss { + status = "okay"; + compatible = "qcom,sc7180-mss-pil"; + iommus = <&apps_smmu 0x460 0x1>, <&apps_smmu 0x444 0x3>; + memory-region = <&mba_mem &mpss_mem>; +}; + &sdhc_1 { status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index e795f3fbc98f..2fafc40e8757 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1011,6 +1011,11 @@ reg = <0 0x01f40000 0 0x40000>; }; + tcsr_regs: syscon@1fc0000 { + compatible = "syscon"; + reg = <0 0x01fc0000 0 0x40000>; + }; + tlmm: pinctrl@3500000 { compatible = "qcom,sc7180-pinctrl"; reg = <0 0x03500000 0 0x300000>, @@ -1889,7 +1894,8 @@ remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sc7180-mpss-pas"; - reg = <0 0x04080000 0 0x4040>; + reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>; + reg-names = "qdsp6", "rmb"; interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, @@ -1900,19 +1906,33 @@ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack", "shutdown-ack"; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <&gcc GCC_MSS_NAV_AXI_CLK>, + <&gcc GCC_MSS_SNOC_AXI_CLK>, + <&gcc GCC_MSS_MFAB_AXIS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bus", "nav", "snoc_axi", + "mnoc_axi", "xo"; power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, <&rpmhpd SC7180_CX>, + <&rpmhpd SC7180_MX>, <&rpmhpd SC7180_MSS>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "load_state", "cx", "mx", "mss"; memory-region = <&mpss_mem>; qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, + <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "mss_restart", "pdc_reset"; + + qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; + qcom,spare-regs = <&tcsr_regs 0xb3e4>; + status = "disabled"; glink-edge { |