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authorLinus Walleij <linus.walleij@linaro.org>2013-03-19 19:58:49 +0100
committerLinus Walleij <linus.walleij@linaro.org>2013-06-03 08:04:41 +0200
commitae9daf2d00ee103b257a1f3b4ea9c575b708fe7a (patch)
tree8ac127b66bb592e0016dedb3d0f4e6161c7b6972 /arch/arm/mach-integrator/pci_v3.c
parent01ef31053ddda5d5aee86dca61193d1395273d53 (diff)
ARM: integrator: move static ioremapping into PCIv3 driver
Try to make this driver self-contained by moving the ioremapping into the driver. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-integrator/pci_v3.c')
-rw-r--r--arch/arm/mach-integrator/pci_v3.c48
1 files changed, 47 insertions, 1 deletions
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 059ac4e8a67e..a3cefdebd136 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -34,10 +34,28 @@
#include <mach/platform.h>
#include <mach/irqs.h>
+#include <asm/mach/map.h>
#include <asm/signal.h>
#include <asm/mach/pci.h>
#include <asm/irq_regs.h>
+#include "pci_v3.h"
+
+/*
+ * Where in the memory map does PCI live?
+ *
+ * This represents a fairly liberal usage of address space. Even though
+ * the V3 only has two windows (therefore we need to map stuff on the fly),
+ * we maintain the same addresses, even if they're not mapped.
+ */
+#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M */
+#define PHYS_PCI_IO_BASE 0x60000000 /* 16M */
+#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M */
+#define PHYS_PCI_V3_BASE 0x62000000 /* 64K */
+
+#define PCI_MEMORY_VADDR IOMEM(0xe8000000)
+#define PCI_CONFIG_VADDR IOMEM(0xec000000)
+
/*
* V3 Local Bus to PCI Bridge definitions
*
@@ -851,7 +869,6 @@ static int __init pci_v3_probe(struct platform_device *pdev)
return -ENODEV;
}
- vga_base = (unsigned long)PCI_MEMORY_VADDR;
pci_common_init(&pci_v3);
return 0;
@@ -869,3 +886,32 @@ static int __init pci_v3_init(void)
}
subsys_initcall(pci_v3_init);
+
+/*
+ * Static mappings for the PCIv3 bridge
+ *
+ * e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
+ * ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
+ * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
+ */
+static struct map_desc pci_v3_io_desc[] __initdata __maybe_unused = {
+ {
+ .virtual = (unsigned long)PCI_MEMORY_VADDR,
+ .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
+ .length = SZ_16M,
+ .type = MT_DEVICE
+ }, {
+ .virtual = (unsigned long)PCI_CONFIG_VADDR,
+ .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
+ .length = SZ_16M,
+ .type = MT_DEVICE
+ }
+};
+
+int __init pci_v3_early_init(void)
+{
+ iotable_init(pci_v3_io_desc, ARRAY_SIZE(pci_v3_io_desc));
+ vga_base = (unsigned long)PCI_MEMORY_VADDR;
+ pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
+ return 0;
+}