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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2022-09-09 22:36:01 +0300
committerDamien Le Moal <damien.lemoal@opensource.wdc.com>2022-09-17 01:39:04 +0900
commit9bd2407064680ad544d5edcea688cc45843f23ae (patch)
tree9b03ca16bc13e74f33ce563728e14f072888035c /Documentation/devicetree/bindings/ata
parent0f3680ed1f4ca682e7a44aade35234632fe94505 (diff)
dt-bindings: ata: ahci-platform: Clarify common AHCI props constraints
Indeed in accordance with what is implemented in the AHCI platform driver and the way the AHCI DT nodes are defined in the DT files we can add the next AHCI DT properties constraints: AHCI CSR ID is fixed to 'ahci', PHY name is fixed to 'sata-phy', AHCI controller can't have more than 32 ports by design, AHCI controller can have up to 32 IRQ lines. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Diffstat (limited to 'Documentation/devicetree/bindings/ata')
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-common.yaml17
1 files changed, 12 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml
index e89bda3b62cc..12a97b56226f 100644
--- a/Documentation/devicetree/bindings/ata/ahci-common.yaml
+++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml
@@ -31,12 +31,16 @@ properties:
reg-names:
description: CSR space IDs
+ contains:
+ const: ahci
interrupts:
description:
Generic AHCI state change interrupt. Can be implemented either as a
single line attached to the controller or as a set of the signals
indicating the particular port events.
+ minItems: 1
+ maxItems: 32
ahci-supply:
description: Power regulator for AHCI controller
@@ -52,14 +56,13 @@ properties:
maxItems: 1
phy-names:
- maxItems: 1
+ const: sata-phy
ports-implemented:
$ref: '/schemas/types.yaml#/definitions/uint32'
description:
Mask that indicates which ports the HBA supports. Useful if PI is not
programmed by the BIOS, which is true for some embedded SoC's.
- maximum: 0x1f
patternProperties:
"^sata-port@[0-9a-f]+$":
@@ -80,8 +83,12 @@ $defs:
properties:
reg:
- description: AHCI SATA port identifier
- maxItems: 1
+ description:
+ AHCI SATA port identifier. By design AHCI controller can't have
+ more than 32 ports due to the CAP.NP fields and PI register size
+ constraints.
+ minimum: 0
+ maximum: 31
phys:
description: Individual AHCI SATA port PHY
@@ -89,7 +96,7 @@ $defs:
phy-names:
description: AHCI SATA port PHY ID
- maxItems: 1
+ const: sata-phy
target-supply:
description: Power regulator for SATA port target device