diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2020-05-14 14:54:18 +0800 |
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committer | Rob Herring <robh@kernel.org> | 2020-05-27 20:47:34 -0600 |
commit | f1ea970395618e73d9f9ba83d7cc7e7da0f91355 (patch) | |
tree | f47adb297bd28f933f590f8acb610cc1da217874 | |
parent | abc9e16f4953810f22fb92a43dd223f809589e0c (diff) |
dt-bindings: pwm: Convert imx pwm to json-schema
Convert the imx pwm binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/pwm/imx-pwm.txt | 27 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 66 |
2 files changed, 66 insertions, 27 deletions
diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt deleted file mode 100644 index 22f1c3d8b773..000000000000 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt +++ /dev/null @@ -1,27 +0,0 @@ -Freescale i.MX PWM controller - -Required properties: -- compatible : should be "fsl,<soc>-pwm" and one of the following - compatible strings: - - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1 - - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27 -- reg: physical base address and length of the controller's registers -- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml - in this directory for a description of the cells format. -- clocks : Clock specifiers for both ipg and per clocks. -- clock-names : Clock names should include both "ipg" and "per" -See the clock consumer binding, - Documentation/devicetree/bindings/clock/clock-bindings.txt -- interrupts: The interrupt for the pwm controller - -Example: - -pwm1: pwm@53fb4000 { - #pwm-cells = <3>; - compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; - reg = <0x53fb4000 0x4000>; - clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, - <&clks IMX5_CLK_PWM1_HF_GATE>; - clock-names = "ipg", "per"; - interrupts = <61>; -}; diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml new file mode 100644 index 000000000000..4b62af27d4b3 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX PWM controller + +maintainers: + - Philipp Zabel <p.zabel@pengutronix.de> + +properties: + "#pwm-cells": + description: | + Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml + in this directory for a description of the cells format. + enum: + - 2 + - 3 + + compatible: + enum: + - fsl,imx1-pwm + - fsl,imx27-pwm + + reg: + maxItems: 1 + + clocks: + items: + - description: SoC PWM ipg clock + - description: SoC PWM per clock + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: per + maxItems: 2 + + interrupts: + maxItems: 1 + +required: + - "#pwm-cells" + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx5-clock.h> + + pwm@53fb4000 { + #pwm-cells = <3>; + compatible = "fsl,imx27-pwm"; + reg = <0x53fb4000 0x4000>; + clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, + <&clks IMX5_CLK_PWM1_HF_GATE>; + clock-names = "ipg", "per"; + interrupts = <61>; + }; |