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authorDaniel Vetter <daniel.vetter@ffwll.ch>2021-06-24 01:01:50 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2024-01-08 14:01:49 +0100
commitdc74a48b087c7c2eb0315c821e259158ae435e65 (patch)
treec0e98ace35b9a37190a5acfc665143581353d0fd
parentfb95899e695a8699f8b16e6149dbab845aa3fb24 (diff)
drm/sched: Don't store self-dependencies
This is essentially part of drm_sched_dependency_optimized(), which only amdgpu seems to make use of. Use it a bit more. This would mean that as-is amdgpu can't use the dependency helpers, at least not with the current approach amdgpu has for deciding whether a vm_flush is needed. Since amdgpu also has very special rules around implicit fencing it can't use those helpers either, and adding a drm_sched_job_await_fence_always or similar for amdgpu wouldn't be too onerous. That way the special case handling for amdgpu sticks even more out and we have higher chances that reviewers that go across all drivers wont miss it. Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Luben Tuikov <luben.tuikov@amd.com> Cc: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/scheduler/sched_main.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 1abbcdf38430..5e3ded3e66c2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -871,6 +871,13 @@ int drm_sched_job_add_dependency(struct drm_sched_job *job,
if (!fence)
return 0;
+ /* if it's a fence from us it's guaranteed to be earlier */
+ if (fence->context == job->entity->fence_context ||
+ fence->context == job->entity->fence_context + 1) {
+ dma_fence_put(fence);
+ return 0;
+ }
+
/* Deduplicate if we already depend on a fence from the same context.
* This lets the size of the array of deps scale with the number of
* engines involved, rather than the number of BOs.